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author | Tom Rini <trini@konsulko.com> | 2016-04-25 13:45:32 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2016-04-25 13:45:32 -0400 |
commit | 9f69ab86d0592d528a0372f01fa23684291243fa (patch) | |
tree | 0ad01e07d0097f36840f78b3ac49dbf811ac2f02 /arch/arm/mach-uniphier/arm64/arm-cci500.c | |
parent | e6a365289974fe030372c0fb0151df7940992d39 (diff) | |
parent | b75e072c1c53cade2c3944433d852d7d6046661b (diff) |
Merge branch 'master' of git://www.denx.de/git/u-boot-uniphier
Diffstat (limited to 'arch/arm/mach-uniphier/arm64/arm-cci500.c')
-rw-r--r-- | arch/arm/mach-uniphier/arm64/arm-cci500.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/arm64/arm-cci500.c b/arch/arm/mach-uniphier/arm64/arm-cci500.c new file mode 100644 index 00000000000..607f96a58de --- /dev/null +++ b/arch/arm/mach-uniphier/arm64/arm-cci500.c @@ -0,0 +1,41 @@ +/* + * Initialization of ARM Corelink CCI-500 Cache Coherency Interconnect + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <mapmem.h> +#include <linux/bitops.h> +#include <linux/io.h> +#include <linux/sizes.h> + +#define CCI500_BASE 0x5FD00000 +#define CCI500_SLAVE_OFFSET 0x1000 + +#define CCI500_SNOOP_CTRL +#define CCI500_SNOOP_CTRL_EN_DVM BIT(1) +#define CCI500_SNOOP_CTRL_EN_SNOOP BIT(0) + +void cci500_init(unsigned int nr_slaves) +{ + unsigned long slave_base = CCI500_BASE + CCI500_SLAVE_OFFSET; + int i; + + for (i = 0; i < nr_slaves; i++) { + void __iomem *base; + u32 tmp; + + base = map_sysmem(slave_base, SZ_4K); + + tmp = readl(base); + tmp |= CCI500_SNOOP_CTRL_EN_DVM | CCI500_SNOOP_CTRL_EN_SNOOP; + writel(tmp, base); + + unmap_sysmem(base); + + slave_base += CCI500_SLAVE_OFFSET; + } +} |