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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-15 14:59:04 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-17 09:00:40 +0900
commit8d6c99c66f94c78e65fdacca2fb2857101f8a5e7 (patch)
tree5b299513f0b58bb4232181c5bab2a94f342526fb /arch/arm/mach-uniphier/Makefile
parent78c627cf1f808d5ae9240809a81b71903bdf4fe2 (diff)
ARM: uniphier: refactor MEMCONF init code
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code. There are 3 patterns in terms of MEMCONF init: - DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11 - DRAM 3 channels: sLD3 - DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20 All of them can be moved into a single file by a little more refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/Makefile')
-rw-r--r--arch/arm/mach-uniphier/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index ae78548670..98b42a06ce 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -4,7 +4,8 @@
ifdef CONFIG_SPL_BUILD
-obj-y += init/ bcu/ memconf/
+obj-y += memconf.o
+obj-y += init/ bcu/
obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/
else