diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2016-12-14 17:46:58 +0100 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-01-11 21:27:14 +0100 |
commit | bfd9584e76690d7a54752067475411a8f9c248a0 (patch) | |
tree | 1b42dc9f38bb01d628d80f1bd89260bf1f17c2a0 /arch/arm/mach-tegra | |
parent | 9ab298e2d7d19da250f0a97891155caeec2b7f0e (diff) |
apalis/colibri_t30: fix l4t boot hang due to sbc1 clock
Fix the following boot hang observed when booting our downstream L4T
R16.5 based BSP:
[ 4.174349] tegra_dvfs: rate 408000000 too high for dvfs on sbc1
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r-- | arch/arm/mach-tegra/tegra30/clock.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 4fd8b8a3b1f..b3660285742 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -797,6 +797,7 @@ int tegra_plle_enable(void) } struct periph_clk_init periph_clk_init_table[] = { +#if !defined(CONFIG_TARGET_APALIS_T30) && !defined(CONFIG_TARGET_COLIBRI_T30) { PERIPH_ID_SBC1, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC3, CLOCK_ID_PERIPH }, @@ -805,6 +806,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SBC6, CLOCK_ID_PERIPH }, { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, +#endif /* !CONFIG_TARGET_APALIS_T30 && !CONFIG_TARGET_COLIBRI_T30 */ { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, |