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authorThierry Reding <treding@nvidia.com>2019-04-15 11:32:20 +0200
committerTom Warren <twarren@nvidia.com>2019-06-05 09:16:33 -0700
commit1a869c703d0493cab9defd4cb5754a175a642052 (patch)
tree8b1a2d15d0edd57d08d55cb83010e8d8623e8070 /arch/arm/mach-tegra
parent9e57819294a1b2b247f66a6dbfa380137e166ec5 (diff)
ARM: tegra: Guard memory controller code with a Kconfig symbol
Memory controller code is not relevant on all Tegra SoC generations, so guard it with a Kconfig symbol that can be selected by the generations that need it. This is in preparation for unifying Tegra186 code with the code used on older generations. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Kconfig5
-rw-r--r--arch/arm/mach-tegra/board.c7
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 265051b18a..5763c4ae3c 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -26,6 +26,9 @@ config TEGRA_IVC
U-Boot, it is typically used for communication between the main CPU
and various auxiliary processors.
+config TEGRA_MC
+ bool
+
config TEGRA_COMMON
bool "Tegra common options"
select BINMAN
@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON
select TEGRA_COMMON
select TEGRA_GPIO
select TEGRA_GP_PADCTRL
+ select TEGRA_MC
select TEGRA_NO_BPMP
config TEGRA_ARMV8_COMMON
@@ -111,6 +115,7 @@ config TEGRA210
select TEGRA_CLKRST
select TEGRA_GPIO
select TEGRA_GP_PADCTRL
+ select TEGRA_MC
select TEGRA_NO_BPMP
config TEGRA186
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 209416e6ad..a9e26bd1a3 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -13,7 +13,9 @@
#include <asm/arch/clock.h>
#endif
#include <asm/arch/funcmux.h>
+#if IS_ENABLED(CONFIG_TEGRA_MC)
#include <asm/arch/mc.h>
+#endif
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/ap.h>
#include <asm/arch-tegra/board.h>
@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void)
}
#endif
+#if IS_ENABLED(CONFIG_TEGRA_MC)
/* Read the RAM size directly from the memory controller */
static phys_size_t query_sdram_size(void)
{
@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void)
return size_bytes;
}
+#endif
int dram_init(void)
{
+#if IS_ENABLED(CONFIG_TEGRA_MC)
/* We do not initialise DRAM here. We just query the size */
gd->ram_size = query_sdram_size();
+#endif
+
return 0;
}