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authorClément Péron <peron.clem@gmail.com>2019-04-17 19:41:05 +0200
committerJagan Teki <jagan@amarulasolutions.com>2019-05-20 22:24:47 +0530
commit26f8e0d7f27e19102d6173d1e5831e7a82096779 (patch)
treea06f3b740c1d938e0778d21da5655e30499b2d34 /arch/arm/mach-sunxi
parent5b4b680cfe29a67171ccbe439c66374cb31faca3 (diff)
arm: sunxi: h6: fix reset using r_wdog
Some H6 boards have a watchdog which didn't make the SoC reboot properly. Reason is still unknown but several people have test it. Chen-Yu Tsai : Pine H64 = H6 V200-AWIN H6448BA 7782 => OK OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO Martin Ayotte : Pine H64 = H8069BA 6892 => OK OrangePi 3 = HA047BA 69W2 => KO OrangePi One Plus = H7310BA 6842 => KO OrangePi Lite2 = H6448BA 6662 => KO Clément Péron: Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO After the series of result, Icenowy try to reach Allwinner about this issue but they seems not interested to investigate it. As we don't have the ARIS coproc to do power management and watchdogis the only solution to reset the board. So, Change from watchdog to R_watchdog to allow a reboot on all H6 boards. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/mach-sunxi')
-rw-r--r--arch/arm/mach-sunxi/board.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index c6dd7b8e54..921e4c5175 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -289,9 +289,14 @@ void reset_cpu(ulong addr)
writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
}
#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
+#if defined(CONFIG_MACH_SUN50I_H6)
+ /* WDOG is broken for some H6 rev. use the R_WDOG instead */
static const struct sunxi_wdog *wdog =
- ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
-
+ (struct sunxi_wdog *)SUNXI_R_WDOG_BASE;
+#else
+ static const struct sunxi_wdog *wdog =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
+#endif
/* Set the watchdog for its shortest interval (.5s) and wait */
writel(WDT_CFG_RESET, &wdog->cfg);
writel(WDT_MODE_EN, &wdog->mode);