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authorPatrick Delaunay <patrick.delaunay@st.com>2018-03-19 19:09:21 +0100
committerTom Rini <trini@konsulko.com>2018-04-06 20:45:28 -0400
commit96583cdc2d217686fb2c9e345f0bbaa9c9ea2c49 (patch)
tree8e3f142c2d68bb95e417a82e3a27de2ab5d4d6ba /arch/arm/mach-stm32mp
parentcda3dcb670db795258ac008c99ff09e2e662f310 (diff)
stm32mp: add check of cpu identifier
Add support of DBGMCU_IDC for cpu identifier and revision Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch/arm/mach-stm32mp')
-rw-r--r--arch/arm/mach-stm32mp/cpu.c48
-rw-r--r--arch/arm/mach-stm32mp/include/mach/sys_proto.h16
2 files changed, 63 insertions, 1 deletions
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 34f4d603a0..3e5ac15c8c 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -7,6 +7,7 @@
#include <clk.h>
#include <asm/io.h>
#include <asm/arch/stm32.h>
+#include <asm/arch/sys_proto.h>
/* RCC register */
#define RCC_TZCR (STM32_RCC_BASE + 0x00)
@@ -31,8 +32,13 @@
#define PWR_CR1_DBP BIT(8)
/* DBGMCU register */
+#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00)
#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C)
#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
+#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0)
+#define DBGMCU_IDC_DEV_ID_SHIFT 0
+#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16)
+#define DBGMCU_IDC_REV_ID_SHIFT 16
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
static void security_init(void)
@@ -123,10 +129,50 @@ void enable_caches(void)
dcache_enable();
}
+static u32 read_idc(void)
+{
+ setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
+
+ return readl(DBGMCU_IDC);
+}
+
+u32 get_cpu_rev(void)
+{
+ return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
+}
+
+u32 get_cpu_type(void)
+{
+ return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
- printf("CPU: STM32MP15x\n");
+ char *cpu_s, *cpu_r;
+
+ switch (get_cpu_type()) {
+ case CPU_STMP32MP15x:
+ cpu_s = "15x";
+ break;
+ default:
+ cpu_s = "?";
+ break;
+ }
+
+ switch (get_cpu_rev()) {
+ case CPU_REVA:
+ cpu_r = "A";
+ break;
+ case CPU_REVB:
+ cpu_r = "B";
+ break;
+ default:
+ cpu_r = "?";
+ break;
+ }
+
+ printf("CPU: STM32MP%s.%s\n", cpu_s, cpu_r);
return 0;
}
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
new file mode 100644
index 0000000000..a8c20d1b2a
--- /dev/null
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
+ *
+ * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
+ */
+
+#define CPU_STMP32MP15x 0x500
+
+/* return CPU_STMP32MPxx constants */
+u32 get_cpu_type(void);
+
+#define CPU_REVA 0x1000
+#define CPU_REVB 0x2000
+
+/* return CPU_REV constants */
+u32 get_cpu_rev(void);