diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2018-07-12 19:13:34 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-07-12 16:03:35 +0200 |
| commit | 8c9f247a1a2031b200c04f297d5b9ae1353d9d90 (patch) | |
| tree | 2f780119521b5d46658488e3784ecbd2eb16cd0f /arch/arm/mach-socfpga | |
| parent | 17b3f32dd04f0008890b8bd57ba2ea50601c6f97 (diff) | |
arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga')
| -rw-r--r-- | arch/arm/mach-socfpga/board.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index cb6530f7e8..26d84be6e9 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -19,6 +19,7 @@ DECLARE_GLOBAL_DATA_PTR; void s_init(void) { +#ifndef CONFIG_ARM64 /* * Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled. * This is optional on CycloneV / ArriaV. @@ -29,6 +30,7 @@ void s_init(void) { "isb\n" "dsb\n" ::"r"(0x0)); +#endif } /* |