diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2018-05-24 00:17:27 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-07-12 09:22:11 +0200 |
| commit | c859f2a77d98e0eced780775d668b4b76a97926c (patch) | |
| tree | 4ed0c572a3ccbd756547d36deb115955202a53a2 /arch/arm/mach-socfpga/Makefile | |
| parent | 914a84e6eefa703efccf7bb49bf870fcab060005 (diff) | |
arm: socfpga: Restructure the SPL file
Restructure the SPL so each devices such as CV, A10 and S10
will have their own dedicated SPL file. SPL file determine
the HW initialization flow which is device specific
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/Makefile')
| -rw-r--r-- | arch/arm/mach-socfpga/Makefile | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 478afe2674..e8a1c0f45a 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -39,13 +39,16 @@ obj-y += wrap_pinmux_config_s10.o obj-y += wrap_pll_config_s10.o endif ifdef CONFIG_SPL_BUILD -obj-y += spl.o ifdef CONFIG_TARGET_SOCFPGA_GEN5 +obj-y += spl_gen5.o obj-y += freeze_controller.o obj-y += wrap_iocsr_config.o obj-y += wrap_pinmux_config.o obj-y += wrap_sdram_config.o endif +ifdef CONFIG_TARGET_SOCFPGA_ARRIA10 +obj-y += spl_a10.o +endif endif ifdef CONFIG_TARGET_SOCFPGA_GEN5 |