arm: dra762: Add support for device package identification

DRA762 comes in two packages:
- ABZ: Pin compatible package with DRA742 with DDR@1333MHz
- ACD: High performance(OPP_PLUS) package with new IPs

Both the above packages uses the same IDCODE hence needs to
differentiate using package information in DIE_ID_2.
Add support for the same. Also update clock, ddr, emif information.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

4 files changed, 60 insertions, 2 deletions

diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index 56890a0c54..4f491e60f2 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -66,7 +66,7 @@ static void omap_rev_string(void)
 	u32 major_rev = (omap_rev & 0x00000F00) >> 8;
 	u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
 
-	const char *sec_s;
+	const char *sec_s, *package = NULL;
 
 	switch (get_device_type()) {
 	case TST_DEVICE:
@@ -85,11 +85,29 @@ static void omap_rev_string(void)
 		sec_s = "?";
 	}
 
+#if defined(CONFIG_DRA7XX)
+	if (is_dra76x()) {
+		switch (omap_rev & 0xF) {
+		case DRA762_ABZ_PACKAGE:
+			package = "ABZ";
+			break;
+		case DRA762_ACD_PACKAGE:
+		default:
+			package = "ACD";
+			break;
+		}
+	}
+#endif
+
 	if (soc_variant)
 		printf("OMAP");
 	else
 		printf("DRA");
-	printf("%x-%s ES%x.%x\n", omap_variant, sec_s, major_rev, minor_rev);
+	printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
+	if (package)
+		printf(" %s package\n", package);
+	else
+		puts("\n");
 }
 
 #ifdef CONFIG_SPL_BUILD
@@ -128,6 +146,16 @@ void s_init(void)
 }
 
 /**
+ * init_package_revision() - Initialize package revision
+ *
+ * Function to get the pacakage information. This is expected to be
+ * overridden in the SoC family file where desired.
+ */
+void __weak init_package_revision(void)
+{
+}
+
+/**
  * early_system_init - Does Early system initialization.
  *
  * Does early system init of watchdog, muxing,  andclocks
@@ -146,6 +174,7 @@ void early_system_init(void)
 {
 	init_omap_revision();
 	hw_data_init();
+	init_package_revision();
 
 #ifdef CONFIG_SPL_BUILD
 	if (warm_reset())
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
index 3bdb114bb6..bb05e1920b 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -746,6 +746,8 @@ void __weak hw_data_init(void)
 	*ctrl = &omap5_ctrl;
 	break;
 
+	case DRA762_ABZ_ES1_0:
+	case DRA762_ACD_ES1_0:
 	case DRA762_ES1_0:
 	*prcm = &dra7xx_prcm;
 	*dplls_data = &dra76x_dplls;
@@ -792,6 +794,8 @@ void get_ioregs(const struct ctrl_ioregs **regs)
 	case DRA752_ES1_1:
 	case DRA752_ES2_0:
 	case DRA762_ES1_0:
+	case DRA762_ACD_ES1_0:
+	case DRA762_ABZ_ES1_0:
 		*regs = &ioregs_dra7xx_es1;
 		break;
 	case DRA722_ES1_0:
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c
index 14a35dd284..57f2a8664c 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -389,6 +389,27 @@ void init_omap_revision(void)
 	init_cpu_configuration();
 }
 
+void init_package_revision(void)
+{
+	unsigned int die_id[4] = { 0 };
+	u8 package;
+
+	omap_die_id(die_id);
+	package = (die_id[2] >> 16) & 0x3;
+
+	if (is_dra76x()) {
+		switch (package) {
+		case DRA762_ABZ_PACKAGE:
+			*omap_si_rev = DRA762_ABZ_ES1_0;
+			break;
+		case DRA762_ACD_PACKAGE:
+		default:
+			*omap_si_rev = DRA762_ACD_ES1_0;
+			break;
+		}
+	}
+}
+
 void omap_die_id(unsigned int *die_id)
 {
 	die_id[0] = readl((*ctrl)->control_std_fuse_die_id_0);
diff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c
index 8fb962e39d..c0e0e0888c 100644
--- a/arch/arm/mach-omap2/omap5/sdram.c
+++ b/arch/arm/mach-omap2/omap5/sdram.c
@@ -481,6 +481,8 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
 		*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz);
 		break;
 	case DRA762_ES1_0:
+	case DRA762_ABZ_ES1_0:
+	case DRA762_ACD_ES1_0:
 	case DRA722_ES2_0:
 	case DRA722_ES2_1:
 		*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2;
@@ -711,6 +713,8 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
 		*iterations = sizeof(omap5_bug_00339_regs)/
 			     sizeof(omap5_bug_00339_regs[0]);
 		break;
+	case DRA762_ABZ_ES1_0:
+	case DRA762_ACD_ES1_0:
 	case DRA762_ES1_0:
 	case DRA752_ES1_0:
 	case DRA752_ES1_1: