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authorNishanth Menon <nm@ti.com>2018-06-12 15:24:10 -0500
committerTom Rini <trini@konsulko.com>2018-06-29 11:30:39 -0400
commitdbb7caf110c4a7b9afb7cdc195ac6967d3a30adf (patch)
treefeb42558f200460cf28188f70e9a261a65e1bf90 /arch/arm/mach-omap2
parentc2ca3fdfb916dc8baecea88490df20de4244a7e1 (diff)
ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS
Enable CVE_2017_5715 and since we have our own v7_arch_cp15_set_acr function to setup the bits, we are able to override the settings. Without this enabled, Linux kernel reports: CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable With this enabled, Linux kernel reports: CPU0: Spectre v2: using ICIALLU workaround NOTE: This by itself does not enable the workaround for CPU1 (on OMAP5 and DRA72/AM572 SoCs) and may require additional kernel patches. Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 3bb1ecb58de..77820cc8d1e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -53,6 +53,7 @@ config OMAP54XX
bool "OMAP54XX SoC"
select ARM_ERRATA_798870
select SYS_THUMB_BUILD
+ select ARM_CORTEX_A15_CVE_2017_5715
imply NAND_OMAP_ELM
imply NAND_OMAP_GPMC
imply SPL_DISPLAY_PRINT