Merge tag 'v2021.10-rc4' into next

Prepare v2021.10-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>

# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	board/Arcturus/ucp1020/spl.c
#	cmd/mvebu/Kconfig
#	common/Kconfig.boot
#	common/image-fit.c
#	configs/UCP1020_defconfig
#	configs/sifive_unmatched_defconfig
#	drivers/pci/Kconfig
#	include/configs/UCP1020.h
#	include/configs/sifive-unmatched.h
#	lib/Makefile
#	scripts/config_whitelist.txt

4 files changed, 72 insertions, 69 deletions

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 0b935c46fb8..0272dd7352d 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -14,6 +14,7 @@
 #include <asm/pl310.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <asm/spl.h>
 #include <sdhci.h>
 
 #define DDR_BASE_CS_OFF(n)	(0x0000 + ((n) << 3))
@@ -80,6 +81,65 @@ int mvebu_soc_family(void)
 	return MVEBU_SOC_UNKNOWN;
 }
 
+u32 get_boot_device(void)
+{
+	u32 val;
+	u32 boot_device;
+
+	/*
+	 * First check, if UART boot-mode is active. This can only
+	 * be done, via the bootrom error register. Here the
+	 * MSB marks if the UART mode is active.
+	 */
+	val = readl(CONFIG_BOOTROM_ERR_REG);
+	boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
+	debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
+	if (boot_device == BOOTROM_ERR_MODE_UART)
+		return BOOT_DEVICE_UART;
+
+#ifdef CONFIG_ARMADA_38X
+	/*
+	 * If the bootrom error code contains any other than zeros it's an
+	 * error condition and the bootROM has fallen back to UART boot
+	 */
+	boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
+	if (boot_device)
+		return BOOT_DEVICE_UART;
+#endif
+
+	/*
+	 * Now check the SAR register for the strapped boot-device
+	 */
+	val = readl(CONFIG_SAR_REG);	/* SAR - Sample At Reset */
+	boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
+	debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
+	switch (boot_device) {
+#ifdef BOOT_FROM_NAND
+	case BOOT_FROM_NAND:
+		return BOOT_DEVICE_NAND;
+#endif
+#ifdef BOOT_FROM_MMC
+	case BOOT_FROM_MMC:
+	case BOOT_FROM_MMC_ALT:
+		return BOOT_DEVICE_MMC1;
+#endif
+	case BOOT_FROM_UART:
+#ifdef BOOT_FROM_UART_ALT
+	case BOOT_FROM_UART_ALT:
+#endif
+		return BOOT_DEVICE_UART;
+#ifdef BOOT_FROM_SATA
+	case BOOT_FROM_SATA:
+	case BOOT_FROM_SATA_ALT:
+		return BOOT_DEVICE_SATA;
+#endif
+	case BOOT_FROM_SPI:
+		return BOOT_DEVICE_SPI;
+	default:
+		return BOOT_DEVICE_BOOTROM;
+	};
+}
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 
 #if defined(CONFIG_ARMADA_375)
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 79858858c25..a7a62c7e7d5 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -148,6 +148,8 @@ void __noreturn return_to_bootrom(void);
 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
 #endif
 
+u32 get_boot_device(void);
+
 void get_sar_freq(struct sar_freq_modes *sar_freq);
 
 /*
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 8e8a4058550..aab61f7c15c 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -189,7 +189,7 @@
 #define BOOT_FROM_SPI		0x3
 
 #define CONFIG_SYS_TCLK		200000000	/* 200MHz */
-#else
+#elif defined(CONFIG_ARMADA_XP)
 /* SAR values for Armada XP */
 #define CONFIG_SAR_REG		(MVEBU_REGISTER(0x18230))
 #define CONFIG_SAR2_REG		(MVEBU_REGISTER(0x18234))
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 77ee46cdd85..b798c797cc2 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -172,74 +172,6 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
 	return 0;
 }
 
-static u32 get_boot_device(void)
-{
-	u32 val;
-	u32 boot_device;
-
-	/*
-	 * First check, if UART boot-mode is active. This can only
-	 * be done, via the bootrom error register. Here the
-	 * MSB marks if the UART mode is active.
-	 */
-	val = readl(CONFIG_BOOTROM_ERR_REG);
-	boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
-	debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
-	if (boot_device == BOOTROM_ERR_MODE_UART)
-		return BOOT_DEVICE_UART;
-
-#ifdef CONFIG_ARMADA_38X
-	/*
-	 * If the bootrom error code contains any other than zeros it's an
-	 * error condition and the bootROM has fallen back to UART boot
-	 */
-	boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
-	if (boot_device)
-		return BOOT_DEVICE_UART;
-#endif
-
-	/*
-	 * Now check the SAR register for the strapped boot-device
-	 */
-	val = readl(CONFIG_SAR_REG);	/* SAR - Sample At Reset */
-	boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
-	debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
-	switch (boot_device) {
-#ifdef BOOT_FROM_NAND
-	case BOOT_FROM_NAND:
-		return BOOT_DEVICE_NAND;
-#endif
-#ifdef BOOT_FROM_MMC
-	case BOOT_FROM_MMC:
-	case BOOT_FROM_MMC_ALT:
-		return BOOT_DEVICE_MMC1;
-#endif
-	case BOOT_FROM_UART:
-#ifdef BOOT_FROM_UART_ALT
-	case BOOT_FROM_UART_ALT:
-#endif
-		return BOOT_DEVICE_UART;
-#ifdef BOOT_FROM_SATA
-	case BOOT_FROM_SATA:
-	case BOOT_FROM_SATA_ALT:
-		return BOOT_DEVICE_SATA;
-#endif
-	case BOOT_FROM_SPI:
-		return BOOT_DEVICE_SPI;
-	default:
-		return BOOT_DEVICE_BOOTROM;
-	};
-}
-
-#else
-
-static u32 get_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
-
-#endif
-
 u32 spl_boot_device(void)
 {
 	u32 boot_device = get_boot_device();
@@ -286,6 +218,15 @@ u32 spl_boot_device(void)
 	}
 }
 
+#else
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+#endif
+
 int board_return_to_bootrom(struct spl_image_info *spl_image,
 			    struct spl_boot_device *bootdev)
 {