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authorMarek BehĂșn <marek.behun@nic.cz>2020-04-08 19:25:19 +0200
committerStefan Roese <sr@denx.de>2020-04-14 13:16:42 +0200
commita129f64fb0f817178955e234c0a4f8b415b38759 (patch)
tree71636073ffd059f206dc2d2c6a13a6364dc74976 /arch/arm/mach-mvebu/include
parentf075b425a72c095a1e11ff855c3ba8b060feec20 (diff)
arm64: mvebu: a37xx: improve code determining memory info structures
Currently on Armada-37xx the mem_map structure is statically defined to map first 2 GB of memory as RAM region, and system registers and PCIe region device region. This is insufficient for when there is more RAM or when for example the PCIe windows is mapped to another address by the CPU Address Decoder. In the case when the board has 4 GB RAM, on some boards the ARM Trusted Firmware can move the PCIe window to another address, in order to maximize possible usable RAM. Also the dram_init and dram_init_banksize looks for information in device-tree, and therefore different device trees are needed for boards with different RAM sizes. Therefore we add code that looks at how the ARM Trusted Firmware has configured the CPU Address Decoder windows, and then we update the mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank base addresses and sizes accordingly. Signed-off-by: Marek BehĂșn <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/mach-mvebu/include')
-rw-r--r--arch/arm/mach-mvebu/include/mach/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 16d825220e..3bb541b6ca 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -176,6 +176,10 @@ static inline void mv_rtc_config(void) {}
u64 a8k_dram_scan_ap_sz(void);
int a8k_dram_init_banksize(void);
+/* A3700 dram functions */
+int a3700_dram_init(void);
+int a3700_dram_init_banksize(void);
+
/*
* get_ref_clk
*