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authorDave Gerlach <d-gerlach@ti.com>2021-04-23 11:27:34 -0500
committerLokesh Vutla <lokeshvutla@ti.com>2021-05-12 16:27:57 +0530
commitb4a8c3b242aced38ee7aa1cce664f0108fc3242c (patch)
tree92300958abdf2c3c182545c8659ba851821de992 /arch/arm/mach-k3
parent57dba04afbb7e06d3c1399bc38a2831c158ea478 (diff)
arm: mach-k3: am642: Unlock all applicable control MMR registers
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MAIN domain. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'arch/arm/mach-k3')
-rw-r--r--arch/arm/mach-k3/am642_init.c16
-rw-r--r--arch/arm/mach-k3/include/mach/am64_hardware.h10
2 files changed, 22 insertions, 4 deletions
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index 54944af258..aa0eb72a87 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -15,12 +15,28 @@
#if defined(CONFIG_SPL_BUILD)
+static void ctrl_mmr_unlock(void)
+{
+ /* Unlock all PADCFG_MMR1 module registers */
+ mmr_unlock(PADCFG_MMR1_BASE, 1);
+
+ /* Unlock all CTRL_MMR0 module registers */
+ mmr_unlock(CTRL_MMR0_BASE, 0);
+ mmr_unlock(CTRL_MMR0_BASE, 1);
+ mmr_unlock(CTRL_MMR0_BASE, 2);
+ mmr_unlock(CTRL_MMR0_BASE, 3);
+ mmr_unlock(CTRL_MMR0_BASE, 5);
+ mmr_unlock(CTRL_MMR0_BASE, 6);
+}
+
void board_init_f(ulong dummy)
{
#if defined(CONFIG_CPU_V7R)
setup_k3_mpu_regions();
#endif
+ ctrl_mmr_unlock();
+
/* Init DM early */
spl_early_init();
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index a447f2eae8..06b19b80db 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -12,6 +12,8 @@
#define CTRL_MMR0_BASE 0x43000000
#define CTRLMMR_MAIN_DEVSTAT (CTRL_MMR0_BASE + 0x30)
+#define PADCFG_MMR1_BASE 0xf0000
+
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK 0x00000078
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3
@@ -29,14 +31,14 @@
#define MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK 0x04
/*
- * The CTRL_MMR memory space is divided into several equally-spaced
- * partitions, so defining the partition size allows us to determine
- * register addresses common to those partitions.
+ * The CTRL_MMR and PADCFG_MMR memory space is divided into several
+ * equally-spaced partitions, so defining the partition size allows us to
+ * determine register addresses common to those partitions.
*/
#define CTRL_MMR0_PARTITION_SIZE 0x4000
/*
- * CTRL_MMR lock/kick-mechanism shared register definitions.
+ * CTRL_MMR and PADCFG_MMR lock/kick-mechanism shared register definitions.
*/
#define CTRLMMR_LOCK_KICK0 0x01008
#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490