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authorHeiko Schocher <hs@denx.de>2021-08-17 08:17:18 +0200
committerStefano Babic <sbabic@denx.de>2021-10-07 16:53:50 +0200
commitdeb80ec023ecace8afa3dc13c1bef757a247b206 (patch)
tree8b62ab9142def602c000e0fce5d996e050877675 /arch/arm/mach-imx/spl.c
parent9de35448580020b526b6e5a8b538a59a64c72f0e (diff)
imx: spl: fix imx8m secure boot
cherry-picked from NXP code: 719d665a87c6: ("MLK-20467 imx8m: Fix issue for booting signed image through uuu") which fixes secure boot on imx8m based boards. Problem was that FIT header and so IVT header too, was loaded to memallocated address. So the ivt header address coded in IVT itself does not fit with the real position. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch/arm/mach-imx/spl.c')
-rw-r--r--arch/arm/mach-imx/spl.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 01f6f0a1de..427b7f7859 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -334,6 +334,20 @@ void board_spl_fit_post_load(const void *fit)
}
#endif
+void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
+{
+ int align_len = ARCH_DMA_MINALIGN - 1;
+
+ /* Some devices like SDP, NOR, NAND, SPI are using bl_len =1, so their fit address
+ * is different with SD/MMC, this cause mismatch with signed address. Thus, adjust
+ * the bl_len to align with SD/MMC.
+ */
+ if (bl_len < 512)
+ bl_len = 512;
+
+ return (void *)((CONFIG_SYS_TEXT_BASE - fit_size - bl_len -
+ align_len) & ~align_len);
+}
#endif
#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT)