diff options
| author | Sven Schwermer <sven@svenschwermer.de> | 2022-01-02 20:36:56 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-02-05 13:38:39 +0100 |
| commit | 0be742d06d9a8d4ca8048422a55305a8c4ac571b (patch) | |
| tree | db2350c8b85e897fcbf0c442d25114fd917ddc99 /arch/arm/mach-imx/mx7 | |
| parent | 0c5cc164a911e1e2ae9b4de7224a10cea0309491 (diff) | |
imx: Enable ACTLR.SMP in SPL for i.MX6/7
Similar to what has been done before with c5437e5b for u-boot proper, we
enable the SMP bit for SPL as well. This is necessary when SDP booting
straight into Linux, i.e. falcon boot. When SDP boot mode is active, the
ROM code does not set this bit which makes the caches not work once
activated in Linux.
On an i.MX6ULL (528MHz), this reduces a minimal kernel's boot time into
an initramfs shell from ~6.1s down to ~1.2s.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Diffstat (limited to 'arch/arm/mach-imx/mx7')
| -rw-r--r-- | arch/arm/mach-imx/mx7/soc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 21690072e1..f6aec5a3aa 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -14,6 +14,7 @@ #include <asm/mach-imx/rdc-sema.h> #include <asm/arch/imx-rdc.h> #include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/sys_proto.h> #include <asm/arch/crm_regs.h> #include <asm/bootm.h> #include <dm.h> @@ -323,6 +324,8 @@ int arch_cpu_init(void) imx_gpcv2_init(); + enable_ca7_smp(); + return 0; } #else |