diff options
| author | Ye Li <ye.li@nxp.com> | 2021-10-18 13:43:19 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2022-04-06 18:05:00 +0800 |
| commit | e03e52b8b12dc906da436de1274353ea60b322b8 (patch) | |
| tree | d4b17054a9c8c41c599d8093ce16841898792a3e /arch/arm/mach-imx/imx8ulp | |
| parent | 39d0e50c11f886b3ec1fde9a9d06bc021a875e61 (diff) | |
LFU-252 imx8ulp: upower: Enable AFBB for AP domain
According to RM, it is suggested to enable AFBB for AP domain to
meet timing signoff. For 1Ghz OD frequency, without AFBB enabled,
ARM core is observed not stable.
Power Domain NormVoltage WCS1 Maximum Frequency Timing sign-off
Cortex A35 1.1 V 1V 1GHz Setup and hold fixes (AFBB only)
1.0V 0.9V 750 MHz (TBD) Hold fixes only(AFBB only)
0.9V 0.8V 500 MHz (TBD) Hold fixes only(AFBB, ARBB)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 76df1d9421269f3a42ab83ebce9f555a48996ff3)
Diffstat (limited to 'arch/arm/mach-imx/imx8ulp')
| -rw-r--r-- | arch/arm/mach-imx/imx8ulp/upower/upower_hal.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c b/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c index fb705648cd..c24bc079ec 100644 --- a/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c +++ b/arch/arm/mach-imx/imx8ulp/upower/upower_hal.c @@ -128,6 +128,8 @@ int upower_init(void) uint64_t memon; int ret, ret_val; + struct upwr_dom_bias_cfg_t bias; + do { status = upwr_init(1, muptr, NULL, NULL, upower_apd_inst_isr, NULL); if (upower_status(status)) { @@ -189,5 +191,20 @@ int upower_init(void) if (ret != UPWR_REQ_OK) printk("Faliure %d\n", ret); + /* Enable AFBB for AP domain */ + bias.apply = BIAS_APPLY_APD; + bias.dommode = AFBB_BIAS_MODE; + ret = upwr_pwm_chng_dom_bias(&bias, NULL); + + if (ret) + printf("Enable AFBB for APD bias fail %d\n", ret); + else + printf("Enable AFBB for APD bias ok\n"); + + upower_wait_resp(); + ret = upwr_poll_req_status(UPWR_SG_PWRMGMT, NULL, NULL, &ret_val, 1000); + if (ret != UPWR_REQ_OK) + printk("Faliure %d\n", ret); + return 0; } |