diff options
| author | Ye Li <ye.li@nxp.com> | 2018-10-11 02:06:19 -0700 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2018-10-17 01:57:42 -0700 |
| commit | 264f90d7638a900913f4f87ea4bad0a688f01bc1 (patch) | |
| tree | c882c961fe9f222035ca9a0be34b989f6da77ec6 /arch/arm/mach-imx/imx8m | |
| parent | 1d4209c3676cf9b68cab253140bd935086ebc10f (diff) | |
MLK-19960-1 imx8mm: Add support for variant parts
iMX8MM family has several variant parts below.
Add CPU type and relevant updates
i.MX 8M Mini Quad Full featured, 4x A53
i.MX 8M Mini QuadLite No VPU, 4x A53
i.MX 8M Mini Dual Full featured, 2x A53
i.MX 8M Mini DualLite No VPU, 2x A53
i.MX 8M Mini Solo Full featured, 1x A53
i.MX 8M Mini SoloLite No VPU, 1x A53
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/imx8m')
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 33 |
1 files changed, 26 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index b4a399261de..0cfc0c3f096 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -146,18 +146,36 @@ struct mm_region *mem_map = imx8m_mem_map; static u32 get_cpu_variant_type(u32 type) { - if (type == MXC_CPU_IMX8MQ) { - struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; - struct fuse_bank *bank = &ocotp->bank[1]; - struct fuse_bank1_regs *fuse = - (struct fuse_bank1_regs *)bank->fuse_regs; + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; - u32 value = readl(&fuse->tester4); + u32 value = readl(&fuse->tester4); + if (type == MXC_CPU_IMX8MQ) { if ((value & 0x3) == 0x2) return MXC_CPU_IMX8MD; else if (value & 0x200000) return MXC_CPU_IMX8MQL; + + } else if (type == MXC_CPU_IMX8MM) { + switch (value & 0x3) { + case 2: + if (value & 0x1c0000) + return MXC_CPU_IMX8MMDL; + else + return MXC_CPU_IMX8MMD; + case 3: + if (value & 0x1c0000) + return MXC_CPU_IMX8MMSL; + else + return MXC_CPU_IMX8MMS; + default: + if (value & 0x1c0000) + return MXC_CPU_IMX8MML; + break; + } } return type; @@ -175,7 +193,8 @@ u32 get_cpu_rev(void) /* iMX8MM */ if (major_low == 0x41) { - return (MXC_CPU_IMX8MM << 12) | reg; + type = get_cpu_variant_type(MXC_CPU_IMX8MM); + return (type << 12) | reg; } else { /* iMX8MQ */ if (reg == CHIP_REV_1_0) { |