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authorStefan Agner <stefan.agner@toradex.com>2018-12-14 15:26:00 +0100
committerStefano Babic <sbabic@denx.de>2019-01-09 16:19:36 +0100
commita95d444055134fd8f0e1f2bd4c11222170fe6dc5 (patch)
tree734bcd08659f3e248da887c69d01eef19b8e1034 /arch/arm/mach-imx/ddrmc-vf610.c
parenta1f2779f5188280b1f131138c649354ec67ad12e (diff)
ARM: vf610: ddrmc: program Dummy DDRBYTE1/2
The Vybrid reference manual VFXXXRM Rev. 0 10/2016 states in chapter 5.2.6.1 DUMMY PADS (DDR/QuadSPI) that those pads need to be programed for correct operation of DDR. Assume the default DDR pin configuration which seems to work well on a Colibri VF50. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch/arm/mach-imx/ddrmc-vf610.c')
-rw-r--r--arch/arm/mach-imx/ddrmc-vf610.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
index 3d7da1c25e..7cc8f5d2c0 100644
--- a/arch/arm/mach-imx/ddrmc-vf610.c
+++ b/arch/arm/mach-imx/ddrmc-vf610.c
@@ -61,6 +61,8 @@ void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
VF610_PAD_DDR_WE__DDR_WE_B,
VF610_PAD_DDR_ODT1__DDR_ODT_0,
VF610_PAD_DDR_ODT0__DDR_ODT_1,
+ VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1,
+ VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2,
VF610_PAD_DDR_RESETB,
};