diff options
author | Bai Ping <ping.bai@nxp.com> | 2018-11-01 17:47:20 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@nxp.com> | 2018-11-02 20:50:11 -0500 |
commit | 048327a4f276289c76b7e4280e332f79cb6aa10e (patch) | |
tree | cf365116a7d95fd6c5ae7ee69324afd4d6dfd5b0 /arch/arm/include | |
parent | 86d712e35446669a018969e2ea21e9c29efc2762 (diff) |
MLK-10163-01 imx8mq: Re-desine the dram_pll_init function
Change the dram_pll_init function API to make it same
as i.MX8MM, so the dram init flow can use call the same
API for these two different SOC.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-imx8m/clock_imx8mq.h | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h index 917d075d5c..3f1b18f724 100644 --- a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h +++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h @@ -644,7 +644,27 @@ enum sscg_pll_out_val { SSCG_PLL_OUT_800M, }; -void dram_pll_init(enum sscg_pll_out_val pll_val); +enum dram_pll_out_val { + DRAM_PLL_OUT_100M, + DRAM_PLL_OUT_167M, + DRAM_PLL_OUT_266M, + DRAM_PLL_OUT_667M, + DRAM_PLL_OUT_400M, + DRAM_PLL_OUT_600M, + DRAM_PLL_OUT_700M, + DRAM_PLL_OUT_750M, + DRAM_PLL_OUT_800M, +}; + +enum dram_bypassclk_val { + DRAM_BYPASSCLK_100M, + DRAM_BYPASSCLK_250M, + DRAM_BYPASSCLK_400M, +}; + +void dram_pll_init(enum dram_pll_out_val pll_val); +void dram_enable_bypass(enum dram_bypassclk_val clk_val); +void dram_disable_bypass(void); u32 imx_get_fecclk(void); u32 imx_get_uartclk(void); int clock_init(void); |