diff options
| author | Giulio Benetti <giulio.benetti@benettiengineering.com> | 2020-04-08 17:10:14 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-04-18 12:54:43 +0200 |
| commit | aa045701c21d180d80676354d47e62ed02ecb38d (patch) | |
| tree | d5f7a867afc72b042b696dd2312231565d3ef9ee /arch/arm/include | |
| parent | ceb4ffc74d9aab699e55a530f1f04f75c3eb1f88 (diff) | |
video: mxsfb: add support for i.MXRT
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and
adding .compatible = "fsl,imxrt-lcdif".
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-imxrt/imx-regs.h | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/mach-imx/regs-lcdif.h | 6 |
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-imxrt/imx-regs.h b/arch/arm/include/asm/arch-imxrt/imx-regs.h index 4f1d439f6f4..44c95dcd114 100644 --- a/arch/arm/include/asm/arch-imxrt/imx-regs.h +++ b/arch/arm/include/asm/arch-imxrt/imx-regs.h @@ -17,4 +17,10 @@ #define ANATOP_BASE_ADDR 0x400d8000 +#define MXS_LCDIF_BASE 0x402b8000 + +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) +#include <asm/mach-imx/regs-lcdif.h> +#endif + #endif /* __ASM_ARCH_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h b/arch/arm/include/asm/mach-imx/regs-lcdif.h index b4c430a35cc..58746387966 100644 --- a/arch/arm/include/asm/mach-imx/regs-lcdif.h +++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h @@ -22,7 +22,7 @@ struct mxs_lcdif_regs { defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \ defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \ - defined(CONFIG_IMX8M) + defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT) mxs_reg_32(hw_lcdif_ctrl2) /* 0x20 */ #endif mxs_reg_32(hw_lcdif_transfer_count) /* 0x20/0x30 */ @@ -49,7 +49,7 @@ struct mxs_lcdif_regs { mxs_reg_32(hw_lcdif_csc_coeffctrl2) /* 0x130 */ mxs_reg_32(hw_lcdif_csc_coeffctrl3) /* 0x140 */ mxs_reg_32(hw_lcdif_csc_coeffctrl4) /* 0x150 */ - mxs_reg_32(hw_lcdif_csc_offset) /* 0x160 */ + mxs_reg_32(hw_lcdif_csc_offset) /* 0x160 */ mxs_reg_32(hw_lcdif_csc_limit) /* 0x170 */ #if defined(CONFIG_MX23) @@ -61,7 +61,7 @@ struct mxs_lcdif_regs { defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \ defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) || \ - defined(CONFIG_IMX8M) + defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT) mxs_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */ #endif mxs_reg_32(hw_lcdif_lcdif_stat) /* 0x1d0/0x1b0 */ |