diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2012-01-24 10:57:20 +0530 |
---|---|---|
committer | Gerrit <chrome-bot@google.com> | 2012-02-16 08:18:56 -0800 |
commit | af9403451fbf1d43ce50e353199938f11e7b1ea2 (patch) | |
tree | 13c311bd6872154ecc1e8aee64e42e760ce3f6e5 /arch/arm/include | |
parent | b3d01c15e9cfe3d28f3947eaded1da5dea02ea57 (diff) |
arm: config: tegra: add bct offset address
BUG=chromium-os:23496
TEST=build for Cardhu, Waluigi and Seaboard
Change-Id: I32dbfa02ac1d6954b3a7e515914fbc0b6695f98b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/14683
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/arch-tegra/warmboot.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-tegra/warmboot.h b/arch/arm/include/asm/arch-tegra/warmboot.h index c1a9a159299..be264900bd6 100644 --- a/arch/arm/include/asm/arch-tegra/warmboot.h +++ b/arch/arm/include/asm/arch-tegra/warmboot.h @@ -24,8 +24,6 @@ #ifndef _WARM_BOOT_H_ #define _WARM_BOOT_H_ -#define BCT_OFFSET 0x100 /* BCT starts at 0x100 */ -#define BCT_SDRAM_PARAMS_OFFSET (BCT_OFFSET + 0x88) #define SDRAM_PARAMS_BASE (AP20_BASE_PA_SRAM + BCT_SDRAM_PARAMS_OFFSET) /* bit fields definitions for APB_MISC_GP_HIDREV register */ |