diff options
| author | Silvano di Ninno <silvano.dininno@nxp.com> | 2018-08-13 14:04:46 +0200 |
|---|---|---|
| committer | Silvano di Ninno <silvano.dininno@nxp.com> | 2018-08-16 08:48:47 +0200 |
| commit | 76c9db3ccc8c6e8f719172254c4f9bbdbd12db23 (patch) | |
| tree | 3e41950c5641bdb8ebf186130eed36955162b28d /arch/arm/include | |
| parent | 1731bacd1a7fe071bbff2bfc947cec47463e0e19 (diff) | |
MLK-18502: board:imx8mm_evk enable tzasc
Enable TZASC on i.MX 8mm.
There is a need on 8MM to enable
the BYPASS ID SWAP bit (GPR10 bit 1) in order
for GPU not to generated AXI bus errors.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h b/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h index f7c6cefa74..d16f92813d 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs-imx8mm.h @@ -127,6 +127,7 @@ #define IOMUXC_GPR22 (IOMUXC_GPR_BASE_ADDR + 0x58) #define GPR_TZASC_EN (1 << 0) +#define GPR_TZASC_SWAP_ID (1 << 1) #define GPR_TZASC_EN_LOCK (1 << 16) #define CNTCR_OFF 0x00 |