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authorRuss Dill <Russ.Dill@ti.com>2018-03-20 12:23:00 +0530
committerTom Rini <trini@konsulko.com>2018-04-06 17:04:33 -0400
commit025a0d40e126a0035bb00df067850c23aa783b80 (patch)
treee22b881c5ecf9d754ba5195f385e90bf057a366c /arch/arm/include/asm
parente18945ad22eb2a8baad1a2dbc8c541411ac9528b (diff)
ARM: am33xx: Inhibit re-initialization of DDR during RTC-only
This inhibits the re-inititialization of DDR during an RTC-only resume. If this is not done, an L3 NOC error is produced as the DDR gets accessed before the re-init has time to complete. Tested on AM437x GP EVM. Signed-off-by: Russ Dill <Russ.Dill@ti.com> [j-keerthy@ti.com Ported to Latest Master branch] Signed-off-by: Keerthy <j-keerthy@ti.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-am33xx/cpu.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index e8d7d549e8..b8b2db6c3d 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -68,6 +68,9 @@
#define PRM_RSTCTRL_RESET 0x01
#define PRM_RSTST_WARM_RESET_MASK 0x232
+/* EMIF Control register bits */
+#define EMIF_CTRL_DEVOFF BIT(0)
+
#ifndef __KERNEL_STRICT_NAMES
#ifndef __ASSEMBLY__
#include <asm/ti-common/omap_wdt.h>
@@ -386,8 +389,19 @@ struct cm_device_inst {
};
struct prm_device_inst {
- unsigned int prm_rstctrl;
- unsigned int prm_rstst;
+ unsigned int rstctrl;
+ unsigned int rstst;
+ unsigned int rsttime;
+ unsigned int sram_count;
+ unsigned int ldo_sram_core_set; /* offset 0x10 */
+ unsigned int ldo_sram_core_ctr;
+ unsigned int ldo_sram_mpu_setu;
+ unsigned int ldo_sram_mpu_ctrl;
+ unsigned int io_count; /* offset 0x20 */
+ unsigned int io_pmctrl;
+ unsigned int vc_val_bypass;
+ unsigned int resv1;
+ unsigned int emif_ctrl; /* offset 0x30 */
};
struct cm_dpll {