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authorSimon Glass <sjg@chromium.org>2011-06-07 11:12:37 -0700
committerSimon Glass <sjg@chromium.org>2011-08-29 10:39:16 -0700
commit09aaff19dc440ce967e125392cb7014279db830b (patch)
tree1f837497969820492f47b64abf8dc15db5080d0b /arch/arm/include/asm
parentad828a69c4ea6d882fd1a822e4a6c25e2d3f075d (diff)
Add control over cachability of memory regions
This is needed for LCD support, where we want to make the LCD frame buffer write-through (or off) rather than write-back. BUG=chromium-os:14082 TEST=build U-Boot Change-Id: I7e1bf9358b8c2fb7ae524cc74cdcfa5b0fb60fbe Reviewed-on: http://gerrit.chromium.org/gerrit/2239 Reviewed-by: Anton Staaf <robotboy@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/system.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 2b28a261ba..327eccd5ca 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -75,6 +75,28 @@ static inline void set_cr(unsigned int val)
isb();
}
+/* options available for data cache on each page */
+enum dcache_option {
+ DCACHE_OFF,
+ DCACHE_WRITETHROUGH,
+ DCACHE_WRITEBACK,
+};
+
+/* Size of an MMU section */
+enum {
+ MMU_SECTION_SHIFT = 20,
+ MMU_SECTION_SIZE = 1 << MMU_SECTION_SHIFT,
+};
+
+/**
+ * Change the cache settings for a region.
+ *
+ * \param start start address of memory region to change
+ * \param size size of memory region to change
+ * \param option dcache option to select
+ */
+void mmu_set_region_dcache(u32 start, int size, enum dcache_option option);
+
#endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x)