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authorThierry Reding <treding@nvidia.com>2014-08-26 17:34:21 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2014-10-11 01:13:34 +0200
commit6e1d96ff21cd2595db456b89d2a92fe17b341e01 (patch)
tree1487dc06de97c3388d576b5daa22f51e24ee9e77 /arch/arm/include/asm
parent1369c2d300e4c700eb5e0a7b2d43d76d84c097f9 (diff)
ARM: cache-cp15: Use more accurate types
size_t is the canonical type to represent variables that contain a size. Use it instead of signed integer. Physical addresses can be larger than 32-bit, so use a more appropriate type for them as well. phys_addr_t is a type that is 32-bit on systems that use 32-bit addresses and 64-bit if the system is 64-bit or uses a form of physical address extension to use a larger address space on 32-bit systems. Using these types the same API can be implemented on a wider range of systems. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/system.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index ca2d44faf4e..61e2914d44b 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -201,7 +201,7 @@ enum {
* \param size size of memory region to change
* \param option dcache option to select
*/
-void mmu_set_region_dcache_behaviour(u32 start, int size,
+void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option);
/**