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authorThierry Reding <treding@nvidia.com>2014-08-26 17:34:05 +0200
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2014-10-11 01:09:39 +0200
commit1140932c81d27b4b0e19fbbc524e963dd2c87ae6 (patch)
tree10c400f7bf327e75c1e1de1d1454ff306dc83230 /arch/arm/include/asm
parent196d3e77943dd42c781a145fb7528527a69ab27d (diff)
ARM: tegra: Provide PCIEXCLK reset ID
This reset is required for PCIe and the corresponding ID therefore needs to be defined. The enumeration value for this was properly defined on some SoCs but not on others. Similarly, some contained it in the mapping of peripheral IDs to clock IDs, other didn't. This patch defines it consistently for all supported SoC generations. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-tegra20/clock-tables.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-tegra20/clock-tables.h b/arch/arm/include/asm/arch-tegra20/clock-tables.h
index a09cb019786..894be088cde 100644
--- a/arch/arm/include/asm/arch-tegra20/clock-tables.h
+++ b/arch/arm/include/asm/arch-tegra20/clock-tables.h
@@ -131,7 +131,7 @@ enum periph_id {
/* 72 */
PERIPH_ID_AFI,
PERIPH_ID_CORESIGHT,
- PERIPH_ID_RESERVED74,
+ PERIPH_ID_PCIEXCLK,
PERIPH_ID_AVPUCQ,
PERIPH_ID_RESERVED76,
PERIPH_ID_RESERVED77,