diff options
| author | Priyanka Jain <priyanka.jain@nxp.com> | 2017-04-25 10:12:31 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-05-23 09:12:26 -0700 |
| commit | 5193405a163aa9bab068680167fdeb0e1008e7b5 (patch) | |
| tree | e7b6504ffc29fca66ddb342d2ba11229f04bd85e /arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | |
| parent | 3098e539d6a67df9f2a3c402d62147fa10422150 (diff) | |
board: freescale: ls2080ardb: Enable SD interface for RevF board
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 80c421f710..59410aa7e7 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -1,6 +1,7 @@ /* * LayerScape Internal Memory Map * + * Copyright (C) 2017 NXP Semiconductors * Copyright 2014 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ @@ -45,6 +46,9 @@ #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01010000) #define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000) #define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000) +#define GPIO4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01330000) +#define GPIO4_GPDIR_ADDR (GPIO4_BASE_ADDR + 0x0) +#define GPIO4_GPDAT_ADDR (GPIO4_BASE_ADDR + 0x8) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000) |