diff options
| author | Tom Rini <trini@konsulko.com> | 2020-03-17 11:59:58 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-03-17 11:59:58 -0400 |
| commit | 2738f0edea7d19960d692284d1f378b1a2b4c4a5 (patch) | |
| tree | 47bc76ea90ab5395d30785b4aa83e43b15bc7a70 /arch/arm/dts | |
| parent | b180e32ea39d03021655a31a19d527529a2eb980 (diff) | |
| parent | 445b45042c63c79546124489362ba4e64b61bfdc (diff) | |
Merge tag 'ti-v2020.07-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
K3 J721E:
* OSPI boot support
* Support for loading remote cores in R5 SPL
* PMIC ESM Support
* Minor fixes for R5F and C7x remoteproc drivers
K3 AM654:
* Update AVS class 0 voltages.
* Add I2C nodes
DRA7xx/AM57xx:
* Fixed Android boot on AM57xx
AM33/AM43/Davinci:
* switch to driver model for the net and mdio driver for baltos
* Add DM/DTS support for omap video driver
* Enable fastboot on am335x-evm
Diffstat (limited to 'arch/arm/dts')
24 files changed, 510 insertions, 2 deletions
diff --git a/arch/arm/dts/am335x-brppt1-mmc.dts b/arch/arm/dts/am335x-brppt1-mmc.dts index 9be34d9da0..6f919711f0 100644 --- a/arch/arm/dts/am335x-brppt1-mmc.dts +++ b/arch/arm/dts/am335x-brppt1-mmc.dts @@ -53,6 +53,8 @@ bkl-pwm = <&pwmbacklight>; bkl-tps = <&tps_bl>; + u-boot,dm-pre-reloc; + panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; diff --git a/arch/arm/dts/am335x-brppt1-nand.dts b/arch/arm/dts/am335x-brppt1-nand.dts index 11bd5c551c..9d4340f591 100644 --- a/arch/arm/dts/am335x-brppt1-nand.dts +++ b/arch/arm/dts/am335x-brppt1-nand.dts @@ -53,6 +53,8 @@ bkl-pwm = <&pwmbacklight>; bkl-tps = <&tps_bl>; + u-boot,dm-pre-reloc; + panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; diff --git a/arch/arm/dts/am335x-brppt1-spi.dts b/arch/arm/dts/am335x-brppt1-spi.dts index 01ab74be5e..c078af8fba 100644 --- a/arch/arm/dts/am335x-brppt1-spi.dts +++ b/arch/arm/dts/am335x-brppt1-spi.dts @@ -54,6 +54,8 @@ bkl-pwm = <&pwmbacklight>; bkl-tps = <&tps_bl>; + u-boot,dm-pre-reloc; + panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts index a63fc2da22..7e9516e8f8 100644 --- a/arch/arm/dts/am335x-brsmarc1.dts +++ b/arch/arm/dts/am335x-brsmarc1.dts @@ -59,6 +59,7 @@ /*backlight = <&tps_bl>; */ compatible = "ti,tilcdc,panel"; status = "okay"; + u-boot,dm-pre-reloc; panel-info { ac-bias = <255>; diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts index 33d8ab78d8..6091a12fb7 100644 --- a/arch/arm/dts/am335x-brxre1.dts +++ b/arch/arm/dts/am335x-brxre1.dts @@ -79,6 +79,8 @@ backlight = <&tps_bl>; + u-boot,dm-pre-reloc; + panel-info { ac-bias = <255>; ac-bias-intrpt = <0>; diff --git a/arch/arm/dts/am335x-evm-u-boot.dtsi b/arch/arm/dts/am335x-evm-u-boot.dtsi index b6b97ed16d..d7b049ef20 100644 --- a/arch/arm/dts/am335x-evm-u-boot.dtsi +++ b/arch/arm/dts/am335x-evm-u-boot.dtsi @@ -3,6 +3,12 @@ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ */ +/ { + panel { + u-boot,dm-pre-reloc; + }; +}; + &mmc3 { status = "disabled"; diff --git a/arch/arm/dts/am335x-evmsk-u-boot.dtsi b/arch/arm/dts/am335x-evmsk-u-boot.dtsi new file mode 100644 index 0000000000..599fb377e6 --- /dev/null +++ b/arch/arm/dts/am335x-evmsk-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * am335x-evmsk U-Boot Additions + * + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> + */ + +/ { + panel { + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/am335x-guardian-u-boot.dtsi b/arch/arm/dts/am335x-guardian-u-boot.dtsi index 156b9b0e83..705ef335bf 100644 --- a/arch/arm/dts/am335x-guardian-u-boot.dtsi +++ b/arch/arm/dts/am335x-guardian-u-boot.dtsi @@ -8,6 +8,10 @@ ocp { u-boot,dm-pre-reloc; }; + + panel { + u-boot,dm-pre-reloc; + }; }; &l4_wkup { diff --git a/arch/arm/dts/am335x-pdu001-u-boot.dtsi b/arch/arm/dts/am335x-pdu001-u-boot.dtsi index 84a07bdef4..a799fe9bc3 100644 --- a/arch/arm/dts/am335x-pdu001-u-boot.dtsi +++ b/arch/arm/dts/am335x-pdu001-u-boot.dtsi @@ -7,6 +7,10 @@ ocp { u-boot,dm-pre-reloc; }; + + panel { + u-boot,dm-pre-reloc; + }; }; &l4_wkup { diff --git a/arch/arm/dts/am335x-pxm50-u-boot.dtsi b/arch/arm/dts/am335x-pxm50-u-boot.dtsi new file mode 100644 index 0000000000..77dfe6e262 --- /dev/null +++ b/arch/arm/dts/am335x-pxm50-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * am335x-pxm50 U-Boot Additions + * + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> + */ + +/ { + panel { + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/am335x-rut-u-boot.dtsi b/arch/arm/dts/am335x-rut-u-boot.dtsi new file mode 100644 index 0000000000..b2b4aa596a --- /dev/null +++ b/arch/arm/dts/am335x-rut-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * am335x-rut U-Boot Additions + * + * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it> + */ + +/ { + panel { + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi index aa42d30c72..d9afc5edf4 100644 --- a/arch/arm/dts/da850-evm-u-boot.dtsi +++ b/arch/arm/dts/da850-evm-u-boot.dtsi @@ -14,6 +14,10 @@ nand { compatible = "ti,davinci-nand"; }; + + panel { + u-boot,dm-pre-reloc; + }; }; ð0 { diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi index c42e7553c7..bc9a87210d 100644 --- a/arch/arm/dts/k3-am65-mcu.dtsi +++ b/arch/arm/dts/k3-am65-mcu.dtsi @@ -64,4 +64,42 @@ loczrama = <1>; }; }; + + fss: fss@47000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 248 0>; + assigned-clocks = <&k3_clks 248 0>; + assigned-clock-parents = <&k3_clks 248 2>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi", "cdns,qspi-nor"; + reg = <0x0 0x47050000 0x0 0x100>, + <0x7 0x00000000 0x1 0x00000000>; + interrupts = <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 249 6>; + power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi index 3ead944640..3d89bf32a9 100644 --- a/arch/arm/dts/k3-am65.dtsi +++ b/arch/arm/dts/k3-am65.dtsi @@ -30,6 +30,8 @@ i2c3 = &main_i2c1; i2c4 = &main_i2c2; i2c5 = &main_i2c3; + spi0 = &ospi0; + spi1 = &ospi1; }; chosen { }; @@ -79,7 +81,11 @@ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, - <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, + <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, + <0x00 0x70000000 0x00 0x70000000 0x00 0x200000>, + <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, + <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; cbass_mcu: interconnect@28380000 { compatible = "simple-bus"; @@ -93,7 +99,10 @@ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */ <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */ <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */ - <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */ + <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */ + <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /* FSS OSPI0 data region 1 */ + <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/ + <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/ cbass_wakeup: interconnect@42040000 { compatible = "simple-bus"; diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi index 54ecb3d444..a7e5eb0553 100644 --- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi +++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi @@ -52,6 +52,7 @@ #address-cells = <2>; #size-cells = <2>; ranges; + u-boot,dm-spl; ti,sci-dev-id = <119>; @@ -68,6 +69,7 @@ ti,dma-ring-reset-quirk; ti,sci = <&dmsc>; ti,sci-dev-id = <195>; + u-boot,dm-spl; }; mcu_udmap: udmap@285c0000 { @@ -90,6 +92,7 @@ <0x4>; /* RX_CHAN */ ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */ dma-coherent; + u-boot,dm-spl; }; }; @@ -314,6 +317,10 @@ AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ >; }; + + mcu-fss0-ospi0-pins-default { + u-boot,dm-spl; + }; }; &main_uart0 { @@ -374,3 +381,15 @@ &usb1 { dr_mode = "peripheral"; }; + +&fss { + u-boot,dm-spl; +}; + +&ospi0 { + u-boot,dm-spl; + + flash@0{ + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/k3-am654-base-board.dts b/arch/arm/dts/k3-am654-base-board.dts index 7ebbf17862..5058b6c88e 100644 --- a/arch/arm/dts/k3-am654-base-board.dts +++ b/arch/arm/dts/k3-am654-base-board.dts @@ -64,6 +64,29 @@ AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ >; }; + + main_i2c2_pins_default: main-i2c2-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ + >; + }; +}; + +&main_pmx1 { + main_i2c0_pins_default: main-i2c0-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + + main_i2c1_pins_default: main-i2c1-pins-default { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; }; &wkup_pmx0 { @@ -73,6 +96,22 @@ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ + AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ + AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ + AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ + AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ + AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ + AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ + AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ + AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ + AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ + >; + }; }; &sdhci0 { @@ -96,6 +135,31 @@ }; }; +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + pca9555: gpio@21 { + compatible = "nxp,pca9555"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c1_pins_default>; + clock-frequency = <400000>; +}; + +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c2_pins_default>; + clock-frequency = <400000>; +}; + &dwc3_1 { status = "okay"; }; @@ -117,3 +181,23 @@ &usb0_phy { status = "disabled"; }; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 5d5689d284..257b56a1b0 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -179,6 +179,22 @@ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ + AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ + AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ + AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ + AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ + AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ + AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ + AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ + AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ + AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ + >; + }; }; &main_pmx0 { @@ -239,3 +255,26 @@ u-boot,dm-spl; }; }; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + reg = <0x0 0x47040000 0x0 0x100>, + <0x0 0x50000000 0x0 0x8000000>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index a3a8193216..7b01e4204f 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -349,3 +349,31 @@ &exp2 { u-boot,dm-spl; }; + +&mcu_fss0_ospi0_pins_default { + u-boot,dm-spl; +}; + +&fss { + u-boot,dm-spl; +}; + +&ospi0 { + u-boot,dm-spl; + + flash@0 { + u-boot,dm-spl; + }; +}; + +&ospi1 { + u-boot,dm-spl; + + flash@0 { + u-boot,dm-spl; + }; +}; + +&mcu_fss0_ospi1_pins_default { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts b/arch/arm/dts/k3-j721e-common-proc-board.dts index d216b707fd..496a15e1d1 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-common-proc-board.dts @@ -123,6 +123,19 @@ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ + J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ + J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ + J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ + J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ + J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ + J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ + J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ + >; + }; }; &usbss0 { @@ -172,3 +185,23 @@ #gpio-cells = <2>; }; }; + +&ospi1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <2>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index fe52fd1b2f..2eed50aa5a 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -143,6 +143,39 @@ assigned-clocks = <&k3_clks 102 0>; assigned-clock-rates = <250000000>; }; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 103 0>; + assigned-clocks = <&k3_clks 103 0>; + assigned-clock-parents = <&k3_clks 103 2>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; + + ospi1: spi@47050000 { + compatible = "ti,am654-ospi"; + reg = <0x0 0x47050000 0x0 0x100>, + <0x7 0x00000000 0x1 0x00000000>; + interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 104 0>; + assigned-clocks = <&k3_clks 104 0>; + assigned-clock-rates = <133333333>; + power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; }; mcu_i2c0: i2c@40b00000 { diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi new file mode 100644 index 0000000000..824b301afa --- /dev/null +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/ { + chosen { + firmware-loader = &fs_loader0; + }; + + fs_loader0: fs_loader@0 { + u-boot,dm-pre-reloc; + compatible = "u-boot,fs-loader"; + }; +}; + +&main_r5fss0 { + u-boot,dm-spl; +}; + +&main_r5fss0_core0 { + u-boot,dm-spl; +}; + +&main_r5fss0_core1 { + u-boot,dm-spl; +}; + +&tps659413a { + esm: esm { + compatible = "ti,tps659413-esm"; + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 5973e211c3..403b158f49 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -13,6 +13,8 @@ aliases { remoteproc0 = &sysctrler; remoteproc1 = &a72_0; + remoteproc2 = &main_r5fss0_core0; + remoteproc3 = &main_r5fss0_core1; }; chosen { @@ -75,6 +77,15 @@ }; }; +&cbass_main { + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + u-boot,dm-spl; + }; +}; + &dmsc { mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; mbox-names = "tx", "rx", "notify"; @@ -107,6 +118,36 @@ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ + J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ + J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ + J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ + J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ + J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ + J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ + J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ + J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ + J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ + >; + }; + + mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { + u-boot,dm-spl; + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ + J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ + J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ + J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ + J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ + J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ + J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ + J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ + >; + }; }; &main_pmx0 { @@ -256,4 +297,52 @@ }; }; +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + reg = <0x0 0x47040000 0x0 0x100>, + <0x0 0x50000000 0x0 0x8000000>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&ospi1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; + u-boot,dm-spl; + + reg = <0x0 0x47050000 0x0 0x100>, + <0x0 0x58000000 0x0 0x8000000>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <2>; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-spl; + }; +}; + #include "k3-j721e-common-proc-board-u-boot.dtsi" diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi b/arch/arm/dts/k3-j721e-som-p0.dtsi index 1e1519f1c9..8497ff3e3e 100644 --- a/arch/arm/dts/k3-j721e-som-p0.dtsi +++ b/arch/arm/dts/k3-j721e-som-p0.dtsi @@ -47,6 +47,22 @@ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ >; }; + + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ + J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */ + J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */ + J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */ + J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */ + J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */ + J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */ + J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */ + J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */ + J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ + >; + }; }; &hbmc { @@ -61,3 +77,23 @@ reg = <0x0 0x0 0x4000000>; }; }; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; + + flash@0{ + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <8>; + spi-max-frequency = <40000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi index 68ba517e50..6bd5aabe23 100644 --- a/arch/arm/dts/k3-j721e.dtsi +++ b/arch/arm/dts/k3-j721e.dtsi @@ -40,6 +40,8 @@ i2c7 = &main_i2c4; i2c8 = &main_i2c5; i2c9 = &main_i2c6; + spi0 = &ospi0; + spi1 = &ospi1; }; chosen { }; @@ -135,6 +137,7 @@ #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */ |