diff options
| author | Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> | 2017-02-13 15:58:55 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 16:09:07 +0100 |
| commit | 941f61fe8098c6e31d14a2b2cd909230af2897c6 (patch) | |
| tree | eb95cb0a7ee296c5d32893ee466886c0e78671fd /arch/arm/dts/zynqmp.dtsi | |
| parent | 585ca873ef572f1092e1504418c42f2703be1ea8 (diff) | |
arm64: zynqmp: Update the OPPs for cpu freq
Add operating-points-v2.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynqmp.dtsi')
| -rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 101427045a..a6e844dd45 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -21,6 +21,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; enable-method = "psci"; + operating-points-v2 = <&cpu_opp_table>; reg = <0x0>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -30,6 +31,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x1>; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -38,6 +40,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x2>; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -46,6 +49,7 @@ device_type = "cpu"; enable-method = "psci"; reg = <0x3>; + operating-points-v2 = <&cpu_opp_table>; cpu-idle-states = <&CPU_SLEEP_0>; }; @@ -63,6 +67,31 @@ }; }; + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + opp00 { + opp-hz = /bits/ 64 <1199999988>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp01 { + opp-hz = /bits/ 64 <599999994>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp02 { + opp-hz = /bits/ 64 <399999996>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + opp03 { + opp-hz = /bits/ 64 <299999997>; + opp-microvolt = <1000000>; + clock-latency-ns = <500000>; + }; + }; + dcc: dcc { compatible = "arm,dcc"; status = "disabled"; |