diff options
| author | Manish Narani <manish.narani@xilinx.com> | 2021-07-14 06:17:19 -0600 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-07-26 09:26:41 +0200 |
| commit | 15ca9ebb074e9eca5a8264c93f5678df240fa54d (patch) | |
| tree | 7c76ab72ad4f1326e1e29296e93437c147309be1 /arch/arm/dts/zynqmp-zcu106-revA.dts | |
| parent | 3965d13f933d5aa670f833eb9584f119e4a11d62 (diff) | |
arm64: zynqmp: Move USB3 PHY properties from DWC3 node to USB node
Move the PHY properties from DWC3 node to USB node in ZynqMP DTs as here
the USB3 PHY used is PSGTR, which is connected to Xilinx USB core. This
PHY initialization should be handled from Xilinx USB core as the
prerequisite register configurations are done here only.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynqmp-zcu106-revA.dts')
| -rw-r--r-- | arch/arm/dts/zynqmp-zcu106-revA.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index ac6689c167..50cc72eb92 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -1012,14 +1012,14 @@ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0_default>; + phy-names = "usb3-phy"; + phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; }; &dwc3_0 { status = "okay"; dr_mode = "host"; snps,usb3_lpm_capable; - phy-names = "usb3-phy"; - phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; maximum-speed = "super-speed"; }; |