diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-12-05 18:31:39 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-12-11 17:55:01 +0900 |
| commit | cd62214d98dc07b83c00e177f77ff74bab23a4c0 (patch) | |
| tree | 960e722b73c6a3f0a8c8678389591128050a5293 /arch/arm/dts/uniphier-sld3.dtsi | |
| parent | 2411e0fbd91bba94569cc2ae2192fb582c5bff8b (diff) | |
ARM: dts: uniphier: sync Device Tree with Linux
Sync with the latest kernel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-sld3.dtsi')
| -rw-r--r-- | arch/arm/dts/uniphier-sld3.dtsi | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/arch/arm/dts/uniphier-sld3.dtsi b/arch/arm/dts/uniphier-sld3.dtsi index f5c5487534..919cbff9de 100644 --- a/arch/arm/dts/uniphier-sld3.dtsi +++ b/arch/arm/dts/uniphier-sld3.dtsi @@ -50,12 +50,6 @@ compatible = "fixed-clock"; clock-frequency = <50000000>; }; - - iobus_clk: iobus_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; }; soc { @@ -251,7 +245,7 @@ interrupts = <0 41 1>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&iobus_clk>; + clocks = <&sys_clk 1>; clock-frequency = <100000>; }; @@ -262,7 +256,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 42 1>; - clocks = <&iobus_clk>; + clocks = <&sys_clk 1>; clock-frequency = <100000>; }; @@ -273,7 +267,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 43 1>; - clocks = <&iobus_clk>; + clocks = <&sys_clk 1>; clock-frequency = <100000>; }; @@ -284,7 +278,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 44 1>; - clocks = <&iobus_clk>; + clocks = <&sys_clk 1>; clock-frequency = <100000>; }; @@ -295,7 +289,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 45 1>; - clocks = <&iobus_clk>; + clocks = <&sys_clk 1>; clock-frequency = <400000>; }; @@ -339,9 +333,12 @@ pinctrl-0 = <&pinctrl_emmc>; pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; + reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; bus-width = <8>; non-removable; + cap-mmc-highspeed; + cap-mmc-hw-reset; }; sd: sdhc@5a500000 { @@ -353,8 +350,13 @@ pinctrl-0 = <&pinctrl_sd>; pinctrl-1 = <&pinctrl_sd_1v8>; clocks = <&mio_clk 0>; + reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; }; usb0: usb@5a800100 { @@ -406,7 +408,8 @@ }; soc-glue@5f800000 { - compatible = "simple-mfd", "syscon"; + compatible = "socionext,uniphier-sld3-soc-glue", + "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; u-boot,dm-pre-reloc; @@ -422,7 +425,7 @@ }; sysctrl@f1840000 { - compatible = "socionext,uniphier-sysctrl", + compatible = "socionext,uniphier-sld3-sysctrl", "simple-mfd", "syscon"; reg = <0xf1840000 0x4000>; @@ -438,9 +441,13 @@ }; nand: nand@f8000000 { - compatible = "denali,denali-nand-dt"; - reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; + compatible = "socionext,denali-nand-v5a"; + status = "disabled"; reg-names = "nand_data", "denali_reg"; + reg = <0xf8000000 0x20>, <0xf8100000 0x1000>; + interrupts = <0 65 4>; + clocks = <&sys_clk 2>; + nand-ecc-strength = <8>; }; }; }; |