diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-11-25 00:25:35 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-11-29 00:29:00 +0900 |
| commit | b443fb4210cb760594ebb46899344cdda2dbb616 (patch) | |
| tree | 4762c8002257782e6337ec10617be7052b9ce2dc /arch/arm/dts/uniphier-pxs3.dtsi | |
| parent | e9986a4fa772f1d129725c5712e60298ee14f5b2 (diff) | |
ARM: dts: uniphier: Sync with Linux 4.15-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-pxs3.dtsi')
| -rw-r--r-- | arch/arm/dts/uniphier-pxs3.dtsi | 42 |
1 files changed, 41 insertions, 1 deletions
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index a004bd112f..9c3aad5043 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -7,6 +7,9 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/gpio/uniphier-gpio.h> + /memreserve/ 0x80000000 0x02000000; / { @@ -73,7 +76,7 @@ }; }; - cluster0_opp: opp_table { + cluster0_opp: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -124,6 +127,11 @@ }; }; + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 4>, @@ -147,6 +155,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <58820000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -158,6 +167,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <58820000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -169,6 +179,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <58820000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -180,6 +191,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <58820000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -197,6 +209,8 @@ "gpio_range1", "gpio_range2"; ngpios = <286>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; }; i2c0: i2c@58780000 { @@ -209,6 +223,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -222,6 +237,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -235,6 +251,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <100000>; }; @@ -248,6 +265,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -259,6 +277,7 @@ #size-cells = <0>; interrupts = <0 26 4>; clocks = <&peri_clk 10>; + resets = <&peri_rst 10>; clock-frequency = <400000>; }; @@ -316,9 +335,11 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc_1v8>; clocks = <&sys_clk 4>; + resets = <&sys_rst 4>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + mmc-pwrseq = <&emmc_pwrseq>; cdns,phy-input-delay-legacy = <4>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; @@ -350,6 +371,24 @@ }; }; + soc-glue@5f900000 { + compatible = "socionext,uniphier-pxs3-soc-glue-debug", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; + }; + }; + aidet: aidet@5fc20000 { compatible = "socionext,uniphier-pxs3-aidet"; reg = <0x5fc20000 0x200>; @@ -431,6 +470,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; |