diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-09-22 00:27:41 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-09-25 00:59:33 +0900 |
commit | 019df879a93e266ac19f5eb00e4ee605db279b14 (patch) | |
tree | b11ab5f86fa406775d870b1a51b2cf44fc8f7acc /arch/arm/dts/uniphier-proxstream2-gentil.dts | |
parent | 28f40d4a4db2b6c701d349fd4fac286d21369de2 (diff) |
ARM: uniphier: add ProXstream2 and PH1-LD6b support
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-proxstream2-gentil.dts')
-rw-r--r-- | arch/arm/dts/uniphier-proxstream2-gentil.dts | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts new file mode 100644 index 00000000000..81d2385bf9a --- /dev/null +++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts @@ -0,0 +1,62 @@ +/* + * Device Tree Source for UniPhier ProXstream2 Gentil Board + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "uniphier-proxstream2.dtsi" + +/ { + model = "UniPhier ProXstream2 Gentil Board"; + compatible = "socionext,proxstream2-gentil", "socionext,proxstream2"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + chosen { + bootargs = "console=ttyS2,115200"; + stdout-path = &serial2; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + i2c0 = &i2c0; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; +}; + +&serial2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial2 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart2 { + u-boot,dm-pre-reloc; +}; |