Merge branch '2021-07-06-platform-updates'

- mpc8379erdb DM_USB, DM_PCI and DM_ETH support.
- Drop PCI support from the integrator family of boards
- Add synquacer support
- Assorted lpc32xx updates and improvements
- snapdragon (and related) fixes, Broadcom iproc update

1 files changed, 56 insertions, 0 deletions

diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox.dts b/arch/arm/dts/synquacer-sc2a11-developerbox.dts
new file mode 100644
index 0000000000..42b6cbbb82
--- /dev/null
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox.dts
@@ -0,0 +1,56 @@
+/** @file
+ * Copyright (c) 2017, Linaro Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause-Patent
+ */
+
+/dts-v1/;
+
+#include "synquacer-sc2a11.dtsi"
+
+#define KEY_POWER     116
+
+/ {
+    model = "Socionext Developer Box";
+    compatible = "socionext,developer-box", "socionext,synquacer";
+
+    gpio-keys {
+        compatible = "gpio-keys";
+        interrupt-parent = <&exiu>;
+
+        power {
+            label = "Power Button";
+            linux,code = <KEY_POWER>;
+            interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_FALLING>;
+            wakeup-source;
+        };
+    };
+};
+
+#ifdef TPM2_ENABLE
+&tpm {
+    status = "okay";
+};
+#endif
+
+&gpio {
+    gpio-line-names = "DSW3-PIN1",  "DSW3-PIN2",  "DSW3-PIN3",    "DSW3-PIN4",
+                      "DSW3-PIN5",  "DSW3-PIN6",  "DSW3-PIN7",    "DSW3-PIN8",
+                      "PSIN#",      "PWROFF#",    "GPIO-A",       "GPIO-B",
+                      "GPIO-C",     "GPIO-D",     "PCIE1EXTINT",  "PCIE0EXTINT",
+                      "PHY2-INT#",  "PHY1-INT#",  "GPIO-E",       "GPIO-F",
+                      "GPIO-G",     "GPIO-H",     "GPIO-I",       "GPIO-J",
+                      "GPIO-K",     "GPIO-L",     "PEC-PD26",     "PEC-PD27",
+                      "PEC-PD28",   "PEC-PD29",   "PEC-PD30",     "PEC-PD31";
+};
+
+&netsec {
+    phy-mode = "rgmii-id";
+};
+
+&mdio_netsec {
+    phy_netsec: ethernet-phy@7 {
+        compatible = "ethernet-phy-ieee802.3-c22";
+        reg = <7>;
+    };
+};