diff options
author | Samuel Holland <samuel@sholland.org> | 2022-04-27 15:31:24 -0500 |
---|---|---|
committer | Andre Przywara <andre.przywara@arm.com> | 2022-05-23 00:37:51 +0100 |
commit | 70f24fa02b52b988b852c25b9ded9e86a0ef227a (patch) | |
tree | bdb998beedff01ae021c79ca89e626e46ba9fe3e /arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | |
parent | 4746694cba74c07e213f2874fd118b9a4ce3728e (diff) |
ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.
These changes are combined into one commit due to interdependencies:
- The unit addresses were removed from bitbanged I2C buses, which
drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
and sun6i-a31-colombus.dts.
- The pinctrl nodes were renamed, including some used by the shared
header sunxi-reference-design-tablet.dtsi.
To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.
This commit also adds the following new board devicetrees:
- sun5i-a13-licheepi-one.dts
- sun5i-a13-pocketbook-touch-lux-3.dts
- sun5i-gr8-evb.dts
- sun8i-a23-ippo-q8h-v1.2.dts
- sun8i-a23-ippo-q8h-v5.dts
- sun8i-a33-et-q8-v1.6.dts
- sun8i-a33-ippo-q8h-v1.2.dts
- sun8i-r16-nintendo-super-nes-classic.dts
As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Diffstat (limited to 'arch/arm/dts/sun8i-a33-sinlinx-sina33.dts')
-rw-r--r-- | arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | 34 |
1 files changed, 8 insertions, 26 deletions
diff --git a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts index 541acb4d2b..d54a067fc7 100644 --- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts @@ -63,16 +63,10 @@ panel { compatible = "netron-dy,e231732"; - #address-cells = <1>; - #size-cells = <0>; + power-supply = <®_vcc3v3>; - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - panel_input: endpoint@0 { - reg = <0>; + port { + panel_input: endpoint { remote-endpoint = <&tcon0_out_panel>; }; }; @@ -117,21 +111,21 @@ vref-supply = <®_dcdc1>; status = "okay"; - button@200 { + button-200 { label = "Volume Up"; linux,code = <KEY_VOLUMEUP>; channel = <0>; voltage = <191011>; }; - button@400 { + button-400 { label = "Volume Down"; linux,code = <KEY_VOLUMEDOWN>; channel = <0>; voltage = <391304>; }; - button@600 { + button-600 { label = "Home"; linux,code = <KEY_HOME>; channel = <0>; @@ -140,8 +134,6 @@ }; &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>; vmmc-supply = <®_dcdc1>; bus-width = <4>; cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */ @@ -161,29 +153,19 @@ &mmc2_8bit_pins { /* Increase drive strength for DDR modes */ drive-strength = <40>; - /* eMMC is missing pull-ups */ - bias-pull-up; }; &ohci0 { status = "okay"; }; -&pio { - mmc0_cd_pin_sina33: mmc0_cd_pin@0 { - pins = "PB4"; - function = "gpio_in"; - bias-pull-up; - }; -}; - &r_rsb { status = "okay"; axp22x: pmic@3a3 { compatible = "x-powers,axp223"; reg = <0x3a3>; - interrupt-parent = <&nmi_intc>; + interrupt-parent = <&r_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; eldoin-supply = <®_dcdc1>; }; @@ -278,7 +260,7 @@ &uart0 { pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_b>; + pinctrl-0 = <&uart0_pb_pins>; status = "okay"; }; |