diff options
author | Samuel Holland <samuel@sholland.org> | 2022-04-27 15:31:23 -0500 |
---|---|---|
committer | Andre Przywara <andre.przywara@arm.com> | 2022-05-23 00:37:50 +0100 |
commit | 0605ac405ce1a4cbc32bf8fd2e55b27988761cf1 (patch) | |
tree | a5a646f1712d5de2dea978b45e7c1aab62f1bc06 /arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | |
parent | 91407bbd41f88890ac1e3db17f693b81bc742f27 (diff) |
ARM: dts: sun7i: Sync from Linux v5.18-rc1
Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.
This commit also adds the following new board devicetrees:
- sun7i-a20-haoyu-marsboard.dts
- sun7i-a20-linutronix-testbox-v2.dts
- sun7i-a20-olinuxino-lime-emmc.dts
This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix Mele M5 U-Boot only DT]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts')
-rw-r--r-- | arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts index 4dbcad1343..caa935ca4f 100644 --- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts @@ -74,12 +74,12 @@ leds { compatible = "gpio-leds"; - green { + led-0 { label = "bananapi-m1-plus:green:usr"; gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>; }; - pwr { + led-1 { label = "bananapi-m1-plus:pwr:usr"; gpios = <&pio 7 25 GPIO_ACTIVE_HIGH>; default-state = "on"; @@ -129,14 +129,10 @@ &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; - phy = <&phy1>; + phy-handle = <&phy1>; phy-mode = "rgmii-id"; phy-supply = <®_gmac_3v3>; status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; }; &hdmi { @@ -171,6 +167,12 @@ status = "okay"; }; +&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <®_vcc3v3>; bus-width = <4>; |