diff options
| author | Marek Vasut <marex@denx.de> | 2020-04-22 13:18:13 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2020-05-14 09:02:12 +0200 |
| commit | a8c97f4a00fb5a9a31970351fce4355d37d19c7d (patch) | |
| tree | b6153fa01d9d201027acdf6ff762639b0c4e7db2 /arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | |
| parent | 0c27c16495cfc638056654652db71586fa0830bf (diff) | |
ARM: dts: stm32: Rework DDR DT inclusion
Adjust the DDR configuration dtsi such that they only generate the
DRAM configuration node, the DDR controller node is moved into the
stm32mp157-u-boot.dtsi itself. This permits including multiple DDR
configuration dtsi files in board DT.
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi')
| -rw-r--r-- | arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi index 4b70b60554..f10be58ffb 100644 --- a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi @@ -16,6 +16,7 @@ * address mapping : RBC * Tc > + 85C : N */ +#define DDR_MEM_COMPATIBLE ddr3-1066-888-bin-g-2x4gb-533mhz #define DDR_MEM_NAME "DDR3-1066/888 bin G 2x4Gb 533MHz v1.45" #define DDR_MEM_SPEED 533000 #define DDR_MEM_SIZE 0x40000000 |