diff options
| author | Tom Rini <trini@konsulko.com> | 2021-12-01 07:22:25 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-12-01 07:22:25 -0500 |
| commit | 7f3934fae5a39925d6db45a747aac46352f61b69 (patch) | |
| tree | f94ce46957d293818880dec4baff2f938dbc560c /arch/arm/dts/stm32f769-disco-u-boot.dtsi | |
| parent | 2402c93130c09b881f9cc1369459fb49d9fa0f74 (diff) | |
| parent | c7c06fa776b3a553df922259908fad12cfa0e1e8 (diff) | |
Merge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
- enable simple framebuffer node for splashscreen for stm32mp1
- use lower-case hex for address for stm32 MCU and MPU's device tree
- define LOG_CATEGORY for stmfx pinctrl driver
- add support for probing bus voltage level translator
- add custom PHY reset bindings on AV96
- enable KSZ90x1 PHY driver on DHCOR
- stm32mp1 DDR update:
- add DDR read data eye training
- remove DDR calibration result
- remove DDR tuning support
- compute DDR size from DDRCTL registers
- DHSOM boards:
- increase USB power-good delay
- add update_sf script to install U-Boot into SF
- increase PHY auto-negotiation timeout to 20 seconds
- fix SoM and board coding strap GPIO handling
- auto-detect uSD level translator
Diffstat (limited to 'arch/arm/dts/stm32f769-disco-u-boot.dtsi')
| -rw-r--r-- | arch/arm/dts/stm32f769-disco-u-boot.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi index 7dfe430a402..5589b416522 100644 --- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi @@ -53,9 +53,9 @@ soc { dsi: dsi@40016c00 { compatible = "st,stm32-dsi"; - reg = <0x40016C00 0x800>; + reg = <0x40016c00 0x800>; resets = <&rcc STM32F7_APB2_RESET(DSI)>; - clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>, + clocks = <&rcc 0 STM32F7_APB2_CLOCK(DSI)>, <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>, <&clk_hse>; clock-names = "pclk", "px_clk", "ref"; @@ -227,7 +227,7 @@ }; &qspi { - reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x4000000>; flash0: mx66l51235l@0 { #address-cells = <1>; #size-cells = <1>; |