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authorPatrice Chotard <patrice.chotard@st.com>2020-11-06 08:11:58 +0100
committerPatrick Delaunay <patrick.delaunay@st.com>2020-11-25 10:29:23 +0100
commit61c88ace4bad5c7956acbb952835b2fc81e99157 (patch)
tree424eb90f2993f864fbb26b655a39777d5a411f7a /arch/arm/dts/stm32f469-disco-u-boot.dtsi
parent63185b0a32442fe36fda3f6cb5b29d186085f179 (diff)
ARM: dts: stm32: DT sync with kernel v5.10-rc1 for MCU's boards
Device tree alignment with kernel v5.10-rc1. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch/arm/dts/stm32f469-disco-u-boot.dtsi')
-rw-r--r--arch/arm/dts/stm32f469-disco-u-boot.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 5a89f13054..3cf3a6aa6f 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -66,7 +66,7 @@
};
};
- qspi: quadspi@A0001000 {
+ qspi: spi@A0001000 {
compatible = "st,stm32f469-qspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -220,7 +220,7 @@
};
};
- usart3_pins_a: usart3@0 {
+ usart3_pins_a: usart3-0 {
u-boot,dm-pre-reloc;
pins1 {
u-boot,dm-pre-reloc;
@@ -245,7 +245,7 @@
&qspi {
reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>;
- flash0: n25q128a {
+ flash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";