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authorMarek Vasut <marex@denx.de>2019-06-27 00:19:32 +0200
committermarex <marex@chi.lan>2019-10-09 22:54:18 +0200
commit4a9f633e3d13dbeb6a88de13074c48ec63210f5c (patch)
treec12c485f51e6b3523a554b372a1c76517f6c9d42 /arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
parent94a16b8e70ba8102d8abb0c9bc64b11e19d4bd55 (diff)
ARM: socfpga: vining_fpga: Update DT
Pick minor changes from the downstream DT, disable MMC, add GMAC0 node and adjust PHY skew settings for GMAC1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5_vining_fpga.dts')
-rw-r--r--arch/arm/dts/socfpga_cyclone5_vining_fpga.dts15
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
index be52fbf43d..3fb6e14372 100644
--- a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
+++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
- * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
*/
#include "socfpga_cyclone5.dtsi"
@@ -65,6 +65,11 @@
};
};
+&gmac0 {
+ status = "disabled";
+ phy-mode = "gmii";
+};
+
&gmac1 {
status = "okay";
phy-mode = "rgmii";
@@ -84,10 +89,14 @@
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
+ txd0-skew-ps = <0>;
+ txd1-skew-ps = <0>;
+ txd2-skew-ps = <0>;
+ txd3-skew-ps = <0>;
txen-skew-ps = <0>;
- txc-skew-ps = <1560>;
+ txc-skew-ps = <1860>;
rxdv-skew-ps = <0>;
- rxc-skew-ps = <1200>;
+ rxc-skew-ps = <1860>;
};
};
};