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authorSergiu Moga <sergiu.moga@microchip.com>2022-04-01 12:27:23 +0300
committerEugen Hristev <eugen.hristev@microchip.com>2022-04-26 09:51:46 +0300
commit2016585c3a9486ea438145f47a28ee7fa8f7060c (patch)
tree8cb8e1fe3dca46a084de67ac0aca74b9708c9e56 /arch/arm/dts/sama7g5.dtsi
parentc8532d3f9eb8c69f41a73c734d1874d9a0d2b8df (diff)
ARM: dts: at91: Add RSTC node
Add node for RSTC. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Diffstat (limited to 'arch/arm/dts/sama7g5.dtsi')
-rw-r--r--arch/arm/dts/sama7g5.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index b7c261ebe9e..7015bd7f6d1 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -232,6 +232,13 @@
clocks = <&clk32k 0>;
};
+ reset_controller: rstc@e001d000 {
+ compatible = "microchip,sama7g5-rstc", "microchip,sam9x60-rstc";
+ reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
+ #reset-cells = <1>;
+ clocks = <&clk32k 0>;
+ };
+
clk32k: clock-controller@e001d050 {
compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
reg = <0xe001d050 0x4>;