diff options
| author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2019-09-27 13:08:48 +0000 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2019-10-08 09:16:11 +0300 |
| commit | 885554360d687ac596f71f51f5b4d2ab3a257857 (patch) | |
| tree | 26946c21583b5dd0ae2cae75a3df6964ee331a0e /arch/arm/dts/sam9x60.dtsi | |
| parent | f99e0ad25a9e085adffb47b7bc794f0a450a36e8 (diff) | |
ARM: dts: at91: sam9x60: Add macb0 Ethernet controller
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Diffstat (limited to 'arch/arm/dts/sam9x60.dtsi')
| -rw-r--r-- | arch/arm/dts/sam9x60.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index e880dc0068..a66d0a278a 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -60,6 +60,16 @@ #size-cells = <1>; ranges; + macb0: ethernet@f802c000 { + compatible = "cdns,sam9x60-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_rmii>; + clock-names = "hclk", "pclk"; + clocks = <&macb0_clk>, <&macb0_clk>; + status = "disabled"; + }; + dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; @@ -88,6 +98,22 @@ }; }; + macb0 { + pinctrl_macb0_rmii: macb0_rmii-0 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ + }; + }; + sdhci0 { pinctrl_sdhci0: sdhci0 { atmel,pins = @@ -171,6 +197,11 @@ #clock-cells = <0>; reg = <47>; }; + + macb0_clk: macb0_clk { + #clock-cells = <0>; + reg = <24>; + }; }; generic: gck { |