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authorMeng Dongyang <daniel.meng@rock-chips.com>2017-05-17 18:25:28 +0800
committerSimon Glass <sjg@chromium.org>2017-06-07 07:29:22 -0600
commit75ff918f83d1f8881beed640c3428994564c412c (patch)
treee9d68b0dc9e7ed0893051fc8042ba574fa125639 /arch/arm/dts/rk3328.dtsi
parent4f3a579e0513a50e7f40ee8ddaa6d96cd9647334 (diff)
rockchip: dts: rk3328: support and enable xhci
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/rk3328.dtsi')
-rw-r--r--arch/arm/dts/rk3328.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index e1219c3dc2..f18cfc2627 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -471,6 +471,17 @@
status = "disabled";
};
+ usb_host0_xhci: usb@ff600000 {
+ compatible = "rockchip,rk3328-xhci";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ snps,dis-enblslpm-quirk;
+ snps,phyif-utmi-bits = <16>;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-u2-susphy-quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ffb70000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;