arm: dts: omap3: Re-sync DTS files with Linux 4.13-RC5

The DTS files had some spacing issues and they needed fixing. This
pull re-sync's the OMAP3xx related DTS files with Linux 4.13-RC5.

To keep the DTS and DTSI files clean and in sync with Linux, new
u-boot.dtsi files are added.

Signed-off-by: Adam Ford <aford173@gmail.com>

V3: The resync broke card detect on MMC1 on Logic PD's Torpedo,
    so we add the cd-invert to the Torpedo's -u-boot.dtsi file.

V2: Add the u-boot.dtsi files for OMAP3, OMAP36xx, and Torpedo
    Remove the need for the second patch in the series

1 files changed, 89 insertions, 83 deletions

diff --git a/arch/arm/dts/omap36xx.dtsi b/arch/arm/dts/omap36xx.dtsi
index fc22f0d2dc..a0f2d9e805 100644
--- a/arch/arm/dts/omap36xx.dtsi
+++ b/arch/arm/dts/omap36xx.dtsi
@@ -13,103 +13,109 @@
 #include "omap3.dtsi"
 
 / {
-       aliases {
-               serial3 = &uart4;
-       };
+	aliases {
+		serial3 = &uart4;
+	};
 
-       cpus {
-               /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
-               cpu@0 {
-                       operating-points = <
-                               /* kHz    uV */
-                               300000  1012500
-                               600000  1200000
-                               800000  1325000
-                       >;
-                       clock-latency = <300000>; /* From legacy driver */
-               };
-       };
+	cpus {
+		/* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
+		cpu: cpu@0 {
+			operating-points = <
+				/* kHz    uV */
+				300000  1012500
+				600000  1200000
+				800000  1325000
+			>;
+			clock-latency = <300000>; /* From legacy driver */
+		};
+	};
 
-       ocp@68000000 {
-               uart4: serial@49042000 {
-                       compatible = "ti,omap3-uart";
-                       reg = <0x49042000 0x400>;
-                       interrupts = <80>;
-                       dmas = <&sdma 81 &sdma 82>;
-                       dma-names = "tx", "rx";
-                       ti,hwmods = "uart4";
-                       clock-frequency = <48000000>;
-               };
+	ocp@68000000 {
+		uart4: serial@49042000 {
+			compatible = "ti,omap3-uart";
+			reg = <0x49042000 0x400>;
+			reg-shift = <2>;
+			interrupts = <80>;
+			dmas = <&sdma 81 &sdma 82>;
+			dma-names = "tx", "rx";
+			ti,hwmods = "uart4";
+			clock-frequency = <48000000>;
+		};
 
-               abb_mpu_iva: regulator-abb-mpu {
-                       compatible = "ti,abb-v1";
-                       regulator-name = "abb_mpu_iva";
-                       #address-cells = <0>;
-                       #size-cells = <0>;
-                       reg = <0x483072f0 0x8>, <0x48306818 0x4>;
-                       reg-names = "base-address", "int-address";
-                       ti,tranxdone-status-mask = <0x4000000>;
-                       clocks = <&sys_ck>;
-                       ti,settling-time = <30>;
-                       ti,clock-cycles = <8>;
-                       ti,abb_info = <
-                       /*uV            ABB     efuse   rbb_m   fbb_m   vset_m*/
-                       1012500         0       0       0       0       0
-                       1200000         0       0       0       0       0
-                       1325000         0       0       0       0       0
-                       1375000         1       0       0       0       0
-                       >;
-               };
+		abb_mpu_iva: regulator-abb-mpu {
+			compatible = "ti,abb-v1";
+			regulator-name = "abb_mpu_iva";
+			#address-cells = <0>;
+			#size-cells = <0>;
+			reg = <0x483072f0 0x8>, <0x48306818 0x4>;
+			reg-names = "base-address", "int-address";
+			ti,tranxdone-status-mask = <0x4000000>;
+			clocks = <&sys_ck>;
+			ti,settling-time = <30>;
+			ti,clock-cycles = <8>;
+			ti,abb_info = <
+			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
+			1012500		0	0	0	0	0
+			1200000		0	0	0	0	0
+			1325000		0	0	0	0	0
+			1375000		1	0	0	0	0
+			>;
+		};
 
-               omap3_pmx_core2: pinmux@480025a0 {
-                       compatible = "ti,omap3-padconf", "pinctrl-single";
-                       reg = <0x480025a0 0x5c>;
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       #interrupt-cells = <1>;
-                       interrupt-controller;
-                       pinctrl-single,register-width = <16>;
-                       pinctrl-single,function-mask = <0xff1f>;
-               };
+		omap3_pmx_core2: pinmux@480025a0 {
+			compatible = "ti,omap3-padconf", "pinctrl-single";
+			reg = <0x480025a0 0x5c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#pinctrl-cells = <1>;
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			pinctrl-single,register-width = <16>;
+			pinctrl-single,function-mask = <0xff1f>;
+		};
 
-               isp: isp@480bc000 {
-                       compatible = "ti,omap3-isp";
-                       reg = <0x480bc000 0x12fc
-                              0x480bd800 0x0600>;
-                       interrupts = <24>;
-                       iommus = <&mmu_isp>;
-                       syscon = <&scm_conf 0x2f0>;
-                       ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
-                       #clock-cells = <1>;
-                       ports {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                       };
-               };
+		isp: isp@480bc000 {
+			compatible = "ti,omap3-isp";
+			reg = <0x480bc000 0x12fc
+			       0x480bd800 0x0600>;
+			interrupts = <24>;
+			iommus = <&mmu_isp>;
+			syscon = <&scm_conf 0x2f0>;
+			ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
+			#clock-cells = <1>;
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
 
-               bandgap@48002524 {
-                       reg = <0x48002524 0x4>;
-                       compatible = "ti,omap36xx-bandgap";
-                       #thermal-sensor-cells = <0>;
-               };
-       };
+		bandgap: bandgap@48002524 {
+			reg = <0x48002524 0x4>;
+			compatible = "ti,omap36xx-bandgap";
+			#thermal-sensor-cells = <0>;
+		};
+	};
+
+	thermal_zones: thermal-zones {
+		#include "omap3-cpu-thermal.dtsi"
+	};
 };
 
 /* OMAP3630 needs dss_96m_fck for VENC */
 &venc {
-       clocks = <&dss_tv_fck>, <&dss_96m_fck>;
-       clock-names = "fck", "tv_dac_clk";
+	clocks = <&dss_tv_fck>, <&dss_96m_fck>;
+	clock-names = "fck", "tv_dac_clk";
 };
 
 &ssi {
-       status = "ok";
+	status = "ok";
 
-       clocks = <&ssi_ssr_fck>,
-                <&ssi_sst_fck>,
-                <&ssi_ick>;
-       clock-names = "ssi_ssr_fck",
-                     "ssi_sst_fck",
-                     "ssi_ick";
+	clocks = <&ssi_ssr_fck>,
+		 <&ssi_sst_fck>,
+		 <&ssi_ick>;
+	clock-names = "ssi_ssr_fck",
+		      "ssi_sst_fck",
+		      "ssi_ick";
 };
 
 /include/ "omap34xx-omap36xx-clocks.dtsi"