diff options
author | Apurva Nandan <a-nandan@ti.com> | 2023-06-08 16:55:18 +0530 |
---|---|---|
committer | Vignesh Raghavendra <vigneshr@ti.com> | 2023-06-08 20:53:15 +0530 |
commit | e23bdc6cb72499b316886ac0afeed6ce5db02c41 (patch) | |
tree | ddde6a25ca98844ebd4316d3675466ab24e94630 /arch/arm/dts/k3-j721s2-som-p0.dtsi | |
parent | 63eb572b804648a0ac914999321a9e673713e534 (diff) |
arm: dts: k3-j721s2: Add node for OSPI NAND Flash
J721S2 has an OSPI NAND flash on its SOM connected the OSPI0 instance,
add dts node for the flash. This NAND flash is muxed with OSPI NOR flash
through a physical switch (SW3.1). SW3.1 when set as 1 connects the NAND
flash to the SoC.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j721s2-som-p0.dtsi')
-rw-r--r-- | arch/arm/dts/k3-j721s2-som-p0.dtsi | 60 |
1 files changed, 58 insertions, 2 deletions
diff --git a/arch/arm/dts/k3-j721s2-som-p0.dtsi b/arch/arm/dts/k3-j721s2-som-p0.dtsi index 11e89dac66..7459bcecc2 100644 --- a/arch/arm/dts/k3-j721s2-som-p0.dtsi +++ b/arch/arm/dts/k3-j721s2-som-p0.dtsi @@ -152,7 +152,8 @@ J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */ J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */ J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */ - J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */ + J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 6) /* (B19) MCU_OSPI0_ECC_FAIL */ + J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B20) MCU_OSPI0_RESET_OUT0 */ >; }; }; @@ -336,7 +337,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; - flash@0 { + ospi0_nor: flash@0 { compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; @@ -389,6 +390,61 @@ }; }; }; + + ospi0_nand: nand@0 { + compatible = "spi-nand"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + spi-max-frequency = <25000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <2>; + status = "disabled"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ospi_nand.tiboot3"; + reg = <0x0 0x80000>; + }; + + partition@80000 { + label = "ospi_nand.tispl"; + reg = <0x80000 0x200000>; + }; + + partition@280000 { + label = "ospi_nand.u-boot"; + reg = <0x280000 0x400000>; + }; + + partition@680000 { + label = "ospi_nand.env"; + reg = <0x680000 0x40000>; + }; + + partition@6c0000 { + label = "ospi_nand.env.backup"; + reg = <0x6c0000 0x40000>; + }; + + partition@2000000 { + label = "ospi_nand.rootfs"; + reg = <0x2000000 0x5fc0000>; + }; + + partition@7fc0000 { + label = "ospi_nand.phypattern"; + reg = <0x7fc0000 0x40000>; + }; + }; + }; }; &mcu_r5fss0_core0 { |