diff options
| author | Manorit Chawdhry <m-chawdhry@ti.com> | 2024-01-11 10:07:28 +0530 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2024-03-21 14:26:33 +0000 |
| commit | 8e0ab3ff08aa0464380e2933f7c63fbe0a2683c2 (patch) | |
| tree | d8ee14ffdb3569808d2d6378ac2aeae2457bea81 /arch/arm/dts/k3-j721s2-binman.dtsi | |
| parent | 62ef425c54c2b038febf25aa8aa4a3813417e039 (diff) | |
arm: dts: j7xx: Allow privID 0 to pass through background firewalls
Firewalling IP has 3 permissions slots for slave and DRU firewalls. Each
permission slot can be populated with different accesses to different
privIDs.
Configuring a background firewall with an allow all permission
(0xc3ffff) in just one slot doesn't work as intendted as the other
permission slots which are essentially 0x0000 act as a block all
transaction for privID 0.
Explicitly fill all the permission registers of background firewall
regions to allow all transactions to go through including privID 0.
Foreground firewalls are intendted to block privID 0 as well so they are
not touched.
[ AM68-SK CSI Test ]
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j721s2-binman.dtsi')
| -rw-r--r-- | arch/arm/dts/k3-j721s2-binman.dtsi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi index 5c8db0a309..890504ca7f 100644 --- a/arch/arm/dts/k3-j721s2-binman.dtsi +++ b/arch/arm/dts/k3-j721s2-binman.dtsi @@ -220,6 +220,16 @@ FWPERM_SECURE_PRIV_RWCD | FWPERM_SECURE_USER_RWCD | FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | FWPERM_NON_SECURE_USER_RWCD)>; start_address = <0x0 0x0>; end_address = <0xff 0xffffffff>; @@ -330,6 +340,16 @@ FWPERM_SECURE_PRIV_RWCD | FWPERM_SECURE_USER_RWCD | FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | FWPERM_NON_SECURE_USER_RWCD)>; start_address = <0x0 0x0>; end_address = <0xff 0xffffffff>; @@ -358,7 +378,18 @@ FWPERM_SECURE_PRIV_RWCD | FWPERM_SECURE_USER_RWCD | FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | FWPERM_NON_SECURE_USER_RWCD)>; + start_address = <0x0 0x0>; end_address = <0xff 0xffffffff>; }; @@ -386,6 +417,16 @@ FWPERM_SECURE_PRIV_RWCD | FWPERM_SECURE_USER_RWCD | FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | + FWPERM_NON_SECURE_USER_RWCD)>, + <((FWPRIVID_ALL << FWPRIVID_SHIFT) | + FWPERM_SECURE_PRIV_RWCD | + FWPERM_SECURE_USER_RWCD | + FWPERM_NON_SECURE_PRIV_RWCD | FWPERM_NON_SECURE_USER_RWCD)>; start_address = <0x0 0x0>; end_address = <0xff 0xffffffff>; |