diff options
| author | Pratyush Yadav <p.yadav@ti.com> | 2021-04-14 23:53:46 +0530 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2021-04-14 14:04:24 -0500 |
| commit | 7ee525eb8cc3f1e1b42c16b408ff6ab001e5a8cb (patch) | |
| tree | 563d579ce40d6b586e225fa6fd15a61a5d9dac2e /arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | |
| parent | c3e1d444f95061294e16743f35404230f05606b5 (diff) | |
arm: dts: k3-j7200: Add nodes for OSPI0
TI J7200 has the Cadence OSPI controller for interfacing with OSPI
flashes. Add its nodes to allow using SPI flashes.
The PHY partition is added in U-Boot specific dtsi because it is not
currently required by Kernel so it will make it easier to sync with
Kernel.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j7200-mcu-wakeup.dtsi')
| -rw-r--r-- | arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi index ac78d4cb68..ab0e4fa142 100644 --- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi @@ -269,6 +269,23 @@ #size-cells = <1>; mux-controls = <&hbmc_mux 0>; }; + + ospi0: spi@47040000 { + compatible = "ti,am654-ospi"; + reg = <0x0 0x47040000 0x0 0x100>, + <0x5 0x00000000 0x1 0x0000000>; + interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + clocks = <&k3_clks 103 0>; + assigned-clocks = <&k3_clks 103 0>; + assigned-clock-parents = <&k3_clks 103 2>; + assigned-clock-rates = <166666666>; + power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <1>; + #size-cells = <0>; + }; }; tscadc0: tscadc@40200000 { |