diff options
| author | Faiz Abbas <faiz_abbas@ti.com> | 2020-02-26 13:44:33 +0530 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2020-03-09 08:33:16 +0800 |
| commit | c7d106b4eb3fef78cd05a51b3b6950f152d93c06 (patch) | |
| tree | c477dcc6134d91126376870d75a0c05badd0cd21 /arch/arm/dts/k3-am65-main.dtsi | |
| parent | e8d5dde4473514327b5ea67fb69d8fdd8410240c (diff) | |
mmc: am654_sdhci: Update output tap delay writes
With the latest RIOT, there is a different otap delay value for each
speed mode. Add a new binding with every supported speed mode. Also
disable a given speed mode in the host caps if its corresponding
otap-del-sel is not present.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-am65-main.dtsi')
| -rw-r--r-- | arch/arm/dts/k3-am65-main.dtsi | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi index ab40dafceb5..028f57379b9 100644 --- a/arch/arm/dts/k3-am65-main.dtsi +++ b/arch/arm/dts/k3-am65-main.dtsi @@ -98,7 +98,17 @@ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; mmc-ddr-1_8v; mmc-hs200-1_8v; - ti,otap-del-sel = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-sd-hs = <0x0>; + ti,otap-del-sel-sdr12 = <0x0>; + ti,otap-del-sel-sdr25 = <0x0>; + ti,otap-del-sel-sdr50 = <0x8>; + ti,otap-del-sel-sdr104 = <0x5>; + ti,otap-del-sel-ddr50 = <0x5>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; + ti,otap-del-sel-hs400 = <0x0>; ti,trm-icp = <0x8>; dma-coherent; }; |