diff options
| author | Giulio Benetti <giulio.benetti@benettiengineering.com> | 2021-05-16 23:57:02 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-06-09 13:03:26 +0200 |
| commit | d7308dbd864c1d0447bfe62cc42a6ff470369d66 (patch) | |
| tree | 275107ff703d4d79923fb42cc8f89cf6b5593ba5 /arch/arm/dts/imxrt1020.dtsi | |
| parent | dc54f8290150ebf9d54ece7b6ece188dc616b6db (diff) | |
ARM: dts: imxrt1020: add gpio5 node to this SoC
i.MXRT1020 supports gpio5, so let's add a node for it.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Diffstat (limited to 'arch/arm/dts/imxrt1020.dtsi')
| -rw-r--r-- | arch/arm/dts/imxrt1020.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 884d57f6140..5ba314f9953 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -120,6 +120,17 @@ #interrupt-cells = <2>; }; + gpio5: gpio@400c0000 { + compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; + reg = <0x400c0000 0x4000>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + gpt1: gpt1@401ec000 { compatible = "fsl,imxrt-gpt"; reg = <0x401ec000 0x4000>; |