diff options
author | Tim Harvey <tharvey@gateworks.com> | 2022-04-13 09:02:44 -0700 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2022-04-21 12:44:23 +0200 |
commit | d5cc234154d3909a71cf58f0b28697d75cdcfad9 (patch) | |
tree | b1b0ee5cd9a59da4c224bbfaa737810c8af05325 /arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi | |
parent | fb9ec33878aa72bdcd5c54be73fde1c33277fbab (diff) |
arm: dts: imx8m*-venice: add gpio hog support
Add gpio hog support for board-specific gpio lines:
- put hogs in u-boot.dtsi so as to keep the regular dts files
in sync with the kernel. The hogs will not be put in the kernel
as that makes them un-usable by userspace as well as
re-initializes them to dt defaults overriding changes which may
have been done by bootloader commands.
- specify gpio names and initial config
- enable GPIO_HOG
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi')
-rw-r--r-- | arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi index f5d52c2fe2..92e44d4ba9 100644 --- a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi @@ -3,3 +3,84 @@ * Copyright 2021 Gateworks Corporation */ #include "imx8mm-venice-gw700x-u-boot.dtsi" + +&gpio1 { + rs485_term { + gpio-hog; + output-low; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "rs485_term"; + }; + + mipi_gpio4 { + gpio-hog; + input; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio4"; + }; + + pci_usb_sel { + gpio-hog; + output-low; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "pci_usb_sel"; + }; + + dio_0 { + gpio-hog; + input; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "dio0"; + }; + + dio_1 { + gpio-hog; + input; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "dio1"; + }; +}; + +&gpio4 { + rs485_en { + gpio-hog; + output-low; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "rs485_en"; + }; + + mipi_gpio3 { + gpio-hog; + input; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio3"; + }; + + rs485_half { + gpio-hog; + output-low; + gpios = <2 GPIO_ACTIVE_HIGH>; + line-name = "rs485_hd"; + }; + + mipi_gpio2 { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio2"; + }; + + mipi_gpio1 { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio1"; + }; + + pci_wdis { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "pci_wdis#"; + }; +}; |